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boards/stm32c0316-dk: initial support

This commit is contained in:
Jason Parker 2024-12-11 13:26:08 -05:00 committed by crasbe
parent d5ee4f7c75
commit be12930ae3
7 changed files with 184 additions and 0 deletions

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# SPDX-FileCopyrightText: 2024 BISSELL Homecare, Inc.
# SPDX-License-Identifier: LGPL-2.1-only
config BOARD
default "stm32c0316-dk" if BOARD_STM32C0316_DK
config BOARD_STM32C0316_DK
bool
default y
select CPU_MODEL_STM32C031C6

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MODULE = board
include $(RIOTBASE)/Makefile.base

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CPU = stm32
CPU_MODEL = stm32c031c6
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart

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# we use shared STM32 configuration snippets
INCLUDES += -I$(RIOTBASE)/boards/common/stm32/include
# define the default port depending on the host OS
PORT_LINUX ?= /dev/ttyACM0
PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.SLAB_USBtoUART*)))
# setup serial terminal
include $(RIOTMAKE)/tools/serial.inc.mk
PROGRAMMER ?= openocd
OPENOCD_DEBUG_ADAPTER ?= stlink
# openocd programmer is supported
PROGRAMMERS_SUPPORTED += openocd
# this board uses openocd
include $(RIOTMAKE)/tools/openocd.inc.mk

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@defgroup boards_stm32c0316-dk STM32C0316-DK
@ingroup boards
@brief Support for the STM32C0316-DK board.
## General information
The ST [STM32C0316-DK](https://www.st.com/en/evaluation-tools/stm32c0316-dk.html)
is an evaluation board supporting a ARM Cortex-M0 STM32C031C6 microcontroller
with 8KB of RAM and 32KB of ROM Flash.
## Pinout
See [this application note as reference](https://www.st.com/resource/en/application_note/an5673-getting-started-with-stm32c0-mcu-hardware-development-stmicroelectronics.pdf).
This means the responsibility is on the firmware configurer to take special
care when configuring IO, ensuring that ports are not conflicting on each pin.
## Flashing the Board
A detailed description about the flashing process can be found on the
[guides page](https://guide.riot-os.org/board_specific/stm32/).
The board name for the STM32C0316-DK is `stm32c0316-dk` and the default
programmer is OpenOCD. Please note that the STM32C0 series is only supported by
OpenOCD versions newer than 0.12.0.

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/*
* SPDX-FileCopyrightText: 2024 BISSELL Homecare, Inc.
* SPDX-License-Identifier: LGPL-2.1-only
*/
/**
* @ingroup boards_stm32c0316-dk
* @{
*
* @file
* @brief Board specific definitions for the STM32C0316-DK
*
* @author Jason Parker <Jason.Parker@bissell.com>
*/
#pragma once
#include "cpu.h"
#include "periph_conf.h"
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
#define LED0_PIN_NUM 5
#define LED0_PORT GPIO_PORT_A /**< GPIO port of LED 0 */
#define LED0_PORT_NUM PORT_A
#define LED0_IS_INVERTED 1
#ifdef __cplusplus
}
#endif
#include "stm32_leds.h"
/** @} */

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/*
* SPDX-FileCopyrightText: 2024 BISSELL Homecare, Inc.
* SPDX-License-Identifier: LGPL-2.1-only
*/
/**
* @ingroup boards_stm32c0316-dk
* @{
*
* @file
* @brief Configuration of CPU peripherals for STM32C0316-DK board
*
* @author Jason Parker <Jason.Parker@bissell.com>
*/
#pragma once
#include <stdint.h>
#include "cpu.h"
#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_rtt_default.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name Timer configuration
* @{
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM3,
.max = 0x0000ffff,
.rcc_mask = RCC_APBENR1_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn
}
};
#define TIMER_0_ISR isr_tim3
#define TIMER_NUMOF ARRAY_SIZE(timer_config)
#define TIMER_0_MAX_VALUE 0x0000FFFFUL /* the STM32C031 doesn't have a 32-bit timer */
/** @} */
/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{ /* USART is connected to the ST-Link */
.dev = USART1,
.rcc_mask = RCC_APBENR2_USART1EN,
.rx_pin = GPIO_PIN(PORT_B, 7),
.tx_pin = GPIO_PIN(PORT_B, 6),
.rx_af = GPIO_AF0,
.tx_af = GPIO_AF0,
.bus = APB12,
.irqn = USART1_IRQn,
},
{ /* this USART is connected to the Morpho-Connector */
.dev = USART2,
.rcc_mask = RCC_APBENR1_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF1,
.tx_af = GPIO_AF1,
.bus = APB1,
.irqn = USART2_IRQn,
},
};
#define UART_0_ISR (isr_usart1)
#define UART_1_ISR (isr_usart2)
#define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */
#ifdef __cplusplus
}
#endif
/** @} */