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Merge pull request #16877 from kfessel/p-add-risc-v-cpuarch-info
cpu/riscv,gd32,fe310: add CPU_ARCH, CPU_CORE information adds CPU_ARCH to riscv_common preparing to handle it like cortex-m does adds CPU_CORE to gd32v and fe310 match Kconfig to Makefile changes
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commit
c1e4a28c9b
@ -7,7 +7,7 @@
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config CPU_FAM_FE310
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bool
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select CPU_CORE_RV32I
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select CPU_CORE_RV32IMAC
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select HAS_CPU_FE310
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select HAS_PERIPH_CPUID
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select HAS_PERIPH_GPIO
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@ -42,6 +42,9 @@ config CPU_MODEL
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config CPU
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default "fe310" if CPU_FAM_FE310
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config CPU_CORE
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default "rv32imac" if CPU_CORE_RV32IMAC
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rsource "Kconfig.clk"
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source "$(RIOTCPU)/riscv_common/Kconfig"
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@ -1,3 +1,5 @@
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CPU_CORE := rv32imac
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FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_gpio periph_gpio_irq
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FEATURES_PROVIDED += periph_pm
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@ -7,7 +7,7 @@
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config CPU_FAM_GD32V
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bool
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select CPU_CORE_RV32I
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select CPU_CORE_RV32IMAC
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select HAS_CPU_GD32V
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select HAS_PERIPH_CLIC
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select HAS_PERIPH_GPIO
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@ -37,4 +37,7 @@ config CPU_MODEL
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config CPU
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default "gd32v" if CPU_FAM_GD32V
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config CPU_CORE
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default "rv32imac" if CPU_CORE_RV32IMAC
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source "$(RIOTCPU)/riscv_common/Kconfig"
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@ -1,3 +1,5 @@
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CPU_CORE := rv32imac
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FEATURES_PROVIDED += periph_clic
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_timer
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@ -15,7 +15,7 @@ config CPU_ARCH_RISCV
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select MODULE_MALLOC_THREAD_SAFE if TEST_KCONFIG
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select HAS_SSP
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config CPU_CORE_RV32I
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config CPU_CORE_RV32IMAC
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bool
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select CPU_ARCH_RISCV
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select HAS_ARCH_32BIT
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@ -27,7 +27,4 @@ config HAS_ARCH_RISCV
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Indicates that the current CPU has a RISC-V.
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config CPU_ARCH
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default "risc-v" if CPU_ARCH_RISCV
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config CPU_CORE
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default "rv32i" if CPU_CORE_RV32I
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default "rv32" if CPU_CORE_RV32IMAC
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@ -1,3 +1,7 @@
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ifeq ($(findstring rv32,$(CPU_CORE)),rv32)
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CPU_ARCH := rv32
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endif
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FEATURES_PROVIDED += arch_32bit
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FEATURES_PROVIDED += arch_riscv
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FEATURES_PROVIDED += cpp
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