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cpu/stm32: adapt rtc driver to default CMSIS exti structure

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This commit is contained in:
Alexandre Abadie 2020-05-26 17:29:37 +02:00
parent 09c1afe9c5
commit c40f0a79bf
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GPG Key ID: 1C919A403CAE1405
1 changed files with 18 additions and 5 deletions
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23
cpu/stm32/periph/rtc_all.c
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@ -42,6 +42,19 @@
#define CLKSEL_LSI (RCC_BDCR_RTCSEL_1)
#endif
/* map some EXTI register names */
#if defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32WB)
#define EXTI_REG_RTSR (EXTI->RTSR1)
#define EXTI_REG_FTSR (EXTI->FTSR1)
#define EXTI_REG_PR (EXTI->PR1)
#define EXTI_REG_IMR (EXTI->IMR1)
#else
#define EXTI_REG_RTSR (EXTI->RTSR)
#define EXTI_REG_FTSR (EXTI->FTSR)
#define EXTI_REG_PR (EXTI->PR)
#define EXTI_REG_IMR (EXTI->IMR)
#endif
/* interrupt line name mapping */
#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32L0)
#define IRQN (RTC_IRQn)
@ -231,10 +244,10 @@ void rtc_init(void)
/* configure the EXTI channel, as RTC interrupts are routed through it.
* Needs to be configured to trigger on rising edges. */
EXTI->FTSR &= ~(EXTI_FTSR_BIT);
EXTI->RTSR |= EXTI_RTSR_BIT;
EXTI->IMR |= EXTI_IMR_BIT;
EXTI->PR = EXTI_PR_BIT;
EXTI_REG_FTSR &= ~(EXTI_FTSR_BIT);
EXTI_REG_RTSR |= EXTI_RTSR_BIT;
EXTI_REG_IMR |= EXTI_IMR_BIT;
EXTI_REG_PR = EXTI_PR_BIT;
/* enable global RTC interrupt */
NVIC_EnableIRQ(IRQN);
}
@ -348,6 +361,6 @@ void ISR_NAME(void)
}
RTC->ISR &= ~RTC_ISR_ALRAF;
}
EXTI->PR = EXTI_PR_BIT; /* only clear the associated bit */
EXTI_REG_PR = EXTI_PR_BIT; /* only clear the associated bit */
cortexm_isr_end();
}