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mirror of https://github.com/RIOT-OS/RIOT.git synced 2025-12-28 16:01:18 +01:00

Merge pull request #6651 from aabadie/nucleo32_l031

boards/nucleo32-l031: initial support
This commit is contained in:
Alexandre Abadie 2017-03-16 08:30:48 +01:00 committed by GitHub
commit ca85e8afe4
39 changed files with 6542 additions and 53 deletions

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@ -0,0 +1,3 @@
MODULE = board
include $(RIOTBASE)/Makefile.base

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@ -0,0 +1,3 @@
ifneq (,$(filter saul_default,$(USEMODULE)))
USEMODULE += saul_gpio
endif

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@ -0,0 +1,12 @@
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_gpio
FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
# Various common features of Nucleo boards
FEATURES_PROVIDED += cpp
# The board MPU family (used for grouping by the CI system)
FEATURES_MCU_GROUP = cortex_m0_1

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@ -0,0 +1,13 @@
## the cpu to build for
export CPU = stm32l0
export CPU_MODEL = stm32l031k6
# define the default port depending on the host OS
PORT_LINUX ?= /dev/ttyACM0
PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
# setup serial terminal
include $(RIOTBOARD)/Makefile.include.serial
# this board uses openocd
include $(RIOTBOARD)/Makefile.include.openocd

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@ -0,0 +1,34 @@
/*
* Copyright (C) 2017 Freie Universität Berlin
* 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_nucleo32-l031
* @{
*
* @file
* @brief Board specific implementations for the nucleo32-l031 board
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
#include "board.h"
#include "periph/gpio.h"
void board_init(void)
{
/* initialize the boards LED */
gpio_init(LED0_PIN, GPIO_OUT);
/* initialize the CPU */
cpu_init();
}

7
boards/nucleo32-l031/dist/openocd.cfg vendored Normal file
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@ -0,0 +1,7 @@
source [find interface/stlink-v2-1.cfg]
transport select hla_swd
source [find target/stm32l0.cfg]
reset_config srst_only

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@ -0,0 +1,64 @@
/*
* Copyright (C) 2017 Freie Universität Berlin
* 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @defgroup boards_nucleo32-l031 Nucleo32-L031
* @ingroup boards
* @brief Board specific files for the nucleo32-l031 board
* @{
*
* @file
* @brief Board specific definitions for the nucleo32-l031 board
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Alexandre Aabdie <alexandre.abadie@inria.fr>
*/
#ifndef BOARD_H
#define BOARD_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name xtimer configuration
* @{
*/
#define XTIMER_DEV TIMER_DEV(0)
#define XTIMER_CHAN (0)
#define XTIMER_WIDTH (16)
/** @} */
/**
* @name Macros for controlling the on-board LED.
* @{
*/
#define LED0_PIN GPIO_PIN(PORT_B, 3)
#define LED0_MASK (1 << 3)
#define LED0_ON (GPIOB->BSRR = LED0_MASK)
#define LED0_OFF (GPIOB->BRR = LED0_MASK)
#define LED0_TOGGLE (GPIOB->ODR ^= LED0_MASK)
/** @} */
/**
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
*/
void board_init(void);
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H */
/** @} */

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@ -0,0 +1,48 @@
/*
* Copyright (C) 2017 Inria
* 2017 OTA keys
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_nucleo32-l031
* @{
*
* @file
* @brief Board specific configuration of direct mapped GPIOs
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
* @author Vincent Dupont <vincent@otakeys.com>
*/
#ifndef GPIO_PARAMS_H
#define GPIO_PARAMS_H
#include "board.h"
#include "saul/periph.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief GPIO pin configuration
*/
static const saul_gpio_params_t saul_gpio_params[] =
{
{
.name = "LED(green)",
.pin = LED0_PIN,
.mode = GPIO_OUT
},
};
#ifdef __cplusplus
}
#endif
#endif /* GPIO_PARAMS_H */
/** @} */

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@ -0,0 +1,179 @@
/*
* Copyright (C) 2017 Freie Universität Berlin
* 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_nucleo32-l031
* @{
*
* @file
* @brief Peripheral MCU configuration for the nucleo32-l031 board
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Alexandre Aabdie <alexandre.abadie@inria.fr>
*/
#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name Clock system configuration
* @{
*/
#define CLOCK_HSI (16000000U) /* internal oscillator */
#define CLOCK_CORECLOCK (32000000U) /* desired core clock frequency */
/* configuration of PLL prescaler and multiply values */
/* CORECLOCK := HSI / CLOCK_PLL_DIV * CLOCK_PLL_MUL */
#define CLOCK_PLL_DIV RCC_CFGR_PLLDIV2
#define CLOCK_PLL_MUL RCC_CFGR_PLLMUL4
/* configuration of peripheral bus clock prescalers */
#define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1 /* AHB clock -> 32MHz */
#define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV1 /* APB2 clock -> 32MHz */
#define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV1 /* APB1 clock -> 32MHz */
/* configuration of flash access cycles */
#define CLOCK_FLASH_LATENCY FLASH_ACR_LATENCY
/* bus clocks for simplified peripheral initialization, UPDATE MANUALLY! */
#define CLOCK_AHB (CLOCK_CORECLOCK / 1)
#define CLOCK_APB2 (CLOCK_CORECLOCK / 1)
#define CLOCK_APB1 (CLOCK_CORECLOCK / 1)
/** @} */
/**
* @brief Timer configuration
* @{
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0x0000ffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
}
};
#define TIMER_0_ISR isr_tim2
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**
* @brief UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 15),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF4,
.tx_af = GPIO_AF4,
.bus = APB1,
.irqn = USART2_IRQn
}
};
#define UART_0_ISR (isr_usart2)
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**
* @brief PWM configuration
* @{
*/
static const pwm_conf_t pwm_config[] = {
{
.dev = TIM21,
.rcc_mask = RCC_APB2ENR_TIM21EN,
.chan = { { .pin = GPIO_PIN(PORT_B, 6) /* D5 */, .cc_chan = 0 },
{ .pin = GPIO_UNDEF, .cc_chan = 0 },
{ .pin = GPIO_UNDEF, .cc_chan = 0 },
{ .pin = GPIO_UNDEF, .cc_chan = 0 } },
.af = GPIO_AF5,
.bus = APB2
}
};
#define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
/** @} */
/**
* @name SPI configuration
* @{
*/
static const uint8_t spi_divtable[2][5] = {
{ /* for APB1 @ 32000000Hz */
7, /* -> 125000Hz */
5, /* -> 500000Hz */
4, /* -> 1000000Hz */
2, /* -> 4000000Hz */
1 /* -> 8000000Hz */
},
{ /* for APB2 @ 32000000Hz */
7, /* -> 125000Hz */
5, /* -> 500000Hz */
4, /* -> 1000000Hz */
2, /* -> 4000000Hz */
1 /* -> 8000000Hz */
}
};
static const spi_conf_t spi_config[] = {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_UNDEF,
.af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}
};
#define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
/** @} */
/**
* @brief ADC configuration
* @{
*/
#define ADC_NUMOF (0)
/** @} */
/**
* @brief DAC configuration
* @{
*/
#define DAC_NUMOF (0)
/** @} */
/**
* @name RTC configuration
* @{
*/
#define RTC_NUMOF (0U)
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* PERIPH_CONF_H */
/** @} */

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@ -31,6 +31,9 @@
#ifdef CPU_MODEL_STM32L053R8
#include "vendor/stm32l053xx.h"
#endif
#ifdef CPU_MODEL_STM32L031K6
#include "vendor/stm32l031xx.h"
#endif
#ifdef __cplusplus
extern "C" {

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cpu/stm32l0/include/vendor/stm32l031xx.h vendored Normal file

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/*
* Copyright (C) 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32l0
* @{
*
* @file
* @brief Memory definitions for the STM32L031K6
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 32K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K
cpuid (r) : ORIGIN = 0x1ff80050, LENGTH = 12
}
_cpuid_address = ORIGIN(cpuid);
INCLUDE cortexm_base.ld

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@ -17,8 +17,8 @@ BOARD_INSUFFICIENT_MEMORY := airfy-beacon calliope-mini cc2650stk maple-mini \
microbit nrf51dongle nrf6310 nucleo32-f031 \
nucleo32-f042 nucleo32-f303 nucleo-f030 nucleo-f070 \
nucleo-f072 nucleo-f103 nucleo-f334 nucleo-l053 \
nucleo-l073 opencm904 pca10000 pca10005 spark-core \
stm32f0discovery weio yunjia-nrf51822
nucleo-l073 nucleo32-l031 opencm904 pca10000 pca10005 \
spark-core stm32f0discovery weio yunjia-nrf51822
# Include packages that pull up and auto-init the link layer.
# NOTE: 6LoWPAN will be included if IEEE802.15.4 devices are present

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@ -9,9 +9,9 @@ RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := arduino-duemilanove arduino-mega2560 arduino-uno \
chronos msb-430 msb-430h nucleo32-f031 nucleo32-f042 \
nucleo32-f303 nucleo-f030 nucleo-f070 nucleo-f072 \
nucleo-f334 nucleo-l053 stm32f0discovery telosb \
waspmote-pro weio wsn430-v1_3b wsn430-v1_4 z1
nucleo32-f303 nucleo32-l031 nucleo-f030 nucleo-f070 \
nucleo-f072 nucleo-f334 nucleo-l053 stm32f0discovery \
telosb waspmote-pro weio wsn430-v1_3b wsn430-v1_4 z1
# Include packages that pull up and auto-init the link layer.
# NOTE: 6LoWPAN will be included if IEEE802.15.4 devices are present

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@ -10,8 +10,8 @@ BOARD ?= native
RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := chronos msb-430 msb-430h nucleo32-f031 nucleo32-f042 \
nucleo-f030 nucleo-f334 nucleo-l053 stm32f0discovery \
telosb weio wsn430-v1_3b wsn430-v1_4 z1
nucleo32-l031 nucleo-f030 nucleo-f334 nucleo-l053 \
stm32f0discovery telosb weio wsn430-v1_3b wsn430-v1_4 z1
# Must read nordic_softdevice_ble package before nanocoap package. However,
# can't read it explicitly here because it is read later, as a dependency for

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@ -9,8 +9,8 @@ RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := airfy-beacon calliope-mini cc2650stk maple-mini \
microbit msb-430 msb-430h nrf51dongle nrf6310 \
nucleo32-f031 nucleo32-f042 nucleo32-f303 nucleo-f030 \
nucleo-f070 nucleo-f072 nucleo-f103 nucleo-f334 \
nucleo32-f031 nucleo32-f042 nucleo32-f303 nucleo32-l031 \
nucleo-f030 nucleo-f070 nucleo-f072 nucleo-f103 nucleo-f334 \
nucleo-l053 nucleo-l073 opencm904 pca10000 pca10005 \
spark-core stm32f0discovery telosb weio wsn430-v1_3b \
wsn430-v1_4 yunjia-nrf51822 z1

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@ -8,8 +8,8 @@ BOARD ?= native
RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := calliope-mini chronos microbit msb-430 msb-430h \
nucleo32-f031 nucleo32-f042 nucleo32-f303 nucleo-f030 \
nucleo-f070 nucleo-f072 nucleo-f103 nucleo-f334 \
nucleo32-f031 nucleo32-f042 nucleo32-f303 nucleo32-l031 \
nucleo-f030 nucleo-f070 nucleo-f072 nucleo-f103 nucleo-f334 \
nucleo-l053 spark-core stm32f0discovery telosb weio \
wsn430-v1_3b wsn430-v1_4 z1

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@ -9,8 +9,8 @@ RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := airfy-beacon calliope-mini chronos microbit msb-430 \
msb-430h nrf51dongle nrf6310 nucleo32-f031 \
nucleo32-f042 nucleo32-f303 nucleo-f030 nucleo-f070 \
nucleo-f072 nucleo-f103 nucleo-f334 nucleo-l053 \
nucleo32-f042 nucleo32-f303 nucleo32-l031 nucleo-f030 \
nucleo-f070 nucleo-f072 nucleo-f103 nucleo-f334 nucleo-l053 \
pca10000 pca10005 spark-core stm32f0discovery telosb \
weio wsn430-v1_3b wsn430-v1_4 yunjia-nrf51822 z1

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@ -8,7 +8,7 @@ BOARD ?= native
RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := chronos msb-430 msb-430h nucleo32-f031 nucleo32-f042 \
nucleo-f030 nucleo-l053 pca10000 pca10005 \
nucleo32-l031 nucleo-f030 nucleo-l053 pca10000 pca10005 \
stm32f0discovery telosb weio z1
# Include packages that pull up and auto-init the link layer.

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@ -8,7 +8,8 @@ BOARD ?= native
RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := chronos msb-430 msb-430h nucleo32-f031 nucleo32-f042 \
nucleo-f030 nucleo-l053 stm32f0discovery telosb weio
nucleo32-l031 nucleo-f030 nucleo-l053 stm32f0discovery \
telosb weio
# blacklist this until #6022 is sorted out
BOARD_BLACKLIST := nrf52dk

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@ -8,10 +8,10 @@ BOARD ?= native
RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := airfy-beacon chronos msb-430 msb-430h nrf51dongle \
nrf6310 nucleo32-f031 nucleo32-f042 nucleo-f030 \
nucleo-f070 nucleo-f072 nucleo-f334 nucleo-l053 \
pca10000 pca10005 stm32f0discovery telosb weio \
wsn430-v1_3b wsn430-v1_4 yunjia-nrf51822 z1
nrf6310 nucleo32-f031 nucleo32-f042 nucleo32-l031 \
nucleo-f030 nucleo-f070 nucleo-f072 nucleo-f334 \
nucleo-l053 pca10000 pca10005 stm32f0discovery telosb \
weio wsn430-v1_3b wsn430-v1_4 yunjia-nrf51822 z1
# Include packages that pull up and auto-init the link layer.
# NOTE: 6LoWPAN will be included if IEEE802.15.4 devices are present

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@ -4,7 +4,7 @@ include ../Makefile.tests_common
RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := chronos msb-430 msb-430h nucleo32-f031 nucleo32-f042 \
nucleo-f030 nucleo-f070 nucleo-f334 nucleo-l053 \
nucleo32-l031 nucleo-f030 nucleo-f070 nucleo-f334 nucleo-l053 \
stm32f0discovery telosb weio wsn430-v1_3b wsn430-v1_4 \
z1

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@ -7,7 +7,7 @@ RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := airfy-beacon chronos maple-mini msb-430 msb-430h \
nrf51dongle nrf6310 nucleo32-f031 nucleo32-f042 \
nucleo-f030 nucleo-f103 nucleo-f334 nucleo-l053 \
nucleo32-l031 nucleo-f030 nucleo-f103 nucleo-f334 nucleo-l053 \
pca10000 pca10005 spark-core stm32f0discovery telosb \
weio wsn430-v1_3b wsn430-v1_4 yunjia-nrf51822 z1

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@ -7,8 +7,8 @@ RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := airfy-beacon chronos maple-mini msb-430 msb-430h \
nrf51dongle nrf6310 nucleo32-f031 nucleo32-f042 \
nucleo-f030 nucleo-f070 nucleo-f103 nucleo-f334 \
nucleo-l053 pca10000 pca10005 spark-core \
nucleo32-l031 nucleo-f030 nucleo-f070 nucleo-f103 \
nucleo-f334 nucleo-l053 pca10000 pca10005 spark-core \
stm32f0discovery telosb weio wsn430-v1_3b wsn430-v1_4 \
yunjia-nrf51822 z1

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@ -13,9 +13,9 @@ TCP_TEST_CYCLES ?= 10
BOARD_INSUFFICIENT_MEMORY := airfy-beacon arduino-duemilanove arduino-mega2560 \
arduino-uno calliope-mini chronos microbit msb-430 \
msb-430h nrf51dongle nrf6310 nucleo32-f031 \
nucleo32-f042 nucleo32-f303 nucleo-f030 nucleo-f070 \
nucleo-f072 nucleo-f334 nucleo-l053 pca10000 pca10005 \
sb-430 sb-430h stm32f0discovery telosb weio \
nucleo32-f042 nucleo32-f303 nucleo32-l031 nucleo-f030 \
nucleo-f070 nucleo-f072 nucleo-f334 nucleo-l053 pca10000 \
pca10005 sb-430 sb-430h stm32f0discovery telosb weio \
wsn430-v1_3b wsn430-v1_4 yunjia-nrf51822 z1
# This has to be the absolute path to the RIOT base directory:

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@ -11,9 +11,9 @@ TCP_LOCAL_PORT ?= 80
BOARD_INSUFFICIENT_MEMORY := airfy-beacon arduino-duemilanove arduino-mega2560 \
arduino-uno calliope-mini chronos microbit msb-430 \
msb-430h nrf51dongle nrf6310 nucleo32-f031 \
nucleo32-f042 nucleo32-f303 nucleo-f030 nucleo-f070 \
nucleo-f072 nucleo-f334 nucleo-l053 pca10000 pca10005 \
sb-430 sb-430h stm32f0discovery telosb weio \
nucleo32-f042 nucleo32-f303 nucleo32-l031 nucleo-f030 \
nucleo-f070 nucleo-f072 nucleo-f334 nucleo-l053 pca10000 \
pca10005 sb-430 sb-430h stm32f0discovery telosb weio \
wsn430-v1_3b wsn430-v1_4 yunjia-nrf51822 z1
# This has to be the absolute path to the RIOT base directory:

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@ -8,7 +8,7 @@ BOARD_BLACKLIST := arduino-mega2560 waspmote-pro arduino-uno arduino-duemilanove
# The MSP boards don't feature round(), exp(), and log(), which are used in the unittests
BOARD_BLACKLIST += chronos msb-430 msb-430h telosb wsn430-v1_3b wsn430-v1_4 z1
BOARD_INSUFFICIENT_MEMORY := nucleo32-f031 nucleo32-f042 weio
BOARD_INSUFFICIENT_MEMORY := nucleo32-f031 nucleo32-f042 nucleo32-l031 weio
USEMODULE += libfixmath-unittests

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@ -6,8 +6,8 @@ include ../Makefile.tests_common
BOARD_BLACKLIST := arduino-uno arduino-duemilanove arduino-mega2560 chronos \
msb-430 msb-430h telosb waspmote-pro wsn430-v1_3b \
wsn430-v1_4 z1
BOARD_INSUFFICIENT_MEMORY = nucleo32-f031 nucleo32-f042 nucleo-f030 nucleo-f334 \
nucleo-l053 stm32f0discovery weio
BOARD_INSUFFICIENT_MEMORY = nucleo32-f031 nucleo32-f042 nucleo32-l031 nucleo-f030 \
nucleo-f334 nucleo-l053 stm32f0discovery weio
LWIP_IPV4 ?= 0

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@ -7,8 +7,8 @@ include ../Makefile.tests_common
BOARD_BLACKLIST := arduino-uno arduino-duemilanove arduino-mega2560 chronos \
msb-430 msb-430h telosb waspmote-pro wsn430-v1_3b \
wsn430-v1_4 z1
BOARD_INSUFFICIENT_MEMORY = nucleo32-f031 nucleo32-f042 nucleo-f030 nucleo-f334 \
nucleo-l053 stm32f0discovery weio
BOARD_INSUFFICIENT_MEMORY = nucleo32-f031 nucleo32-f042 nucleo32-l031 nucleo-f030 \
nucleo-f334 nucleo-l053 stm32f0discovery weio
LWIP_IPV4 ?= 0

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@ -7,7 +7,7 @@ include ../Makefile.tests_common
BOARD_BLACKLIST := arduino-uno arduino-duemilanove arduino-mega2560 chronos \
msb-430 msb-430h telosb waspmote-pro wsn430-v1_3b \
wsn430-v1_4 z1
BOARD_INSUFFICIENT_MEMORY = nucleo32-f031 nucleo32-f042 nucleo-f030 nucleo-f042 \
BOARD_INSUFFICIENT_MEMORY = nucleo32-f031 nucleo32-f042 nucleo32-l031 nucleo-f030 \
nucleo-f334 nucleo-l053 stm32f0discovery weio
LWIP_IPV4 ?= 0

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@ -1,8 +1,8 @@
APPLICATION = mutex_order
include ../Makefile.tests_common
BOARD_INSUFFICIENT_MEMORY := nucleo32-f031 nucleo32-f042 nucleo-f030 nucleo-l053 \
stm32f0discovery weio
BOARD_INSUFFICIENT_MEMORY := nucleo32-f031 nucleo32-f042 nucleo32-l031 nucleo-f030 \
nucleo-l053 stm32f0discovery weio
include $(RIOTBASE)/Makefile.include

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@ -4,8 +4,8 @@ include ../Makefile.tests_common
BOARD_BLACKLIST := arduino-mega2560 chronos msb-430 msb-430h telosb \
wsn430-v1_3b wsn430-v1_4 z1 waspmote-pro arduino-uno \
arduino-duemilanove
BOARD_INSUFFICIENT_MEMORY := nucleo32-f031 nucleo32-f042 nucleo-f030 nucleo-f334 \
nucleo-l053 stm32f0discovery weio
BOARD_INSUFFICIENT_MEMORY := nucleo32-f031 nucleo32-f042 nucleo32-l031 nucleo-f030 \
nucleo-f334 nucleo-l053 stm32f0discovery weio
USEMODULE += gnrc_ipv6
USEMODULE += gnrc_sock_udp

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@ -5,7 +5,7 @@ include ../Makefile.tests_common
BOARD_BLACKLIST := arduino-mega2560 chronos msb-430 msb-430h telosb wsn430-v1_3b \
wsn430-v1_4 z1 waspmote-pro arduino-uno arduino-duemilanove
BOARD_INSUFFICIENT_MEMORY := chronos msb-430 msb-430h nucleo32-f031 nucleo32-f042 \
nucleo-f030 nucleo-f070 nucleo-f334 nucleo-l053 \
nucleo32-l031 nucleo-f030 nucleo-f070 nucleo-f334 nucleo-l053 \
stm32f0discovery telosb weio wsn430-v1_3b wsn430-v1_4 \
z1

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@ -2,8 +2,8 @@ APPLICATION = posix_semaphore
include ../Makefile.tests_common
BOARD_INSUFFICIENT_MEMORY := chronos mbed_lpc1768 msb-430 msb-430h nrf6310 \
nucleo32-f031 nucleo32-f042 nucleo-f030 nucleo-f334 \
nucleo-l053 pca10000 pca10005 spark-core \
nucleo32-f031 nucleo32-f042 nucleo32-l031 nucleo-f030 \
nucleo-f334 nucleo-l053 pca10000 pca10005 spark-core \
stm32f0discovery weio yunjia-nrf51822
USEMODULE += fmt

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@ -11,7 +11,7 @@ USEMODULE += random
CFLAGS += -DNATIVE_AUTO_EXIT
BOARD_INSUFFICIENT_MEMORY += airfy-beacon chronos mbed_lpc1768 msb-430 msb-430h \
nrf51dongle nrf6310 nucleo32-f031 nucleo32-f042 \
nrf51dongle nrf6310 nucleo32-f031 nucleo32-f042 nucleo32-l031 \
nucleo-f030 nucleo-f334 nucleo-l053 pca10000 pca10005 \
spark-core stm32f0discovery weio yunjia-nrf51822

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@ -1,8 +1,8 @@
APPLICATION = rmutex
include ../Makefile.tests_common
BOARD_INSUFFICIENT_MEMORY := nucleo32-f031 nucleo32-f042 nucleo-f030 nucleo-l053 \
stm32f0discovery weio
BOARD_INSUFFICIENT_MEMORY := nucleo32-f031 nucleo32-f042 nucleo32-l031 nucleo-f030 \
nucleo-l053 stm32f0discovery weio
include $(RIOTBASE)/Makefile.include

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@ -2,8 +2,8 @@ APPLICATION = driver_slip
include ../Makefile.tests_common
BOARD_INSUFFICIENT_MEMORY := msb-430 msb-430h nucleo32-f031 nucleo32-f042 \
nucleo-f030 nucleo-f334 nucleo-l053 stm32f0discovery \
weio
nucleo32-l031 nucleo-f030 nucleo-f334 nucleo-l053 \
stm32f0discovery weio
BOARD_BLACKLIST += mips-malta

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@ -4,9 +4,9 @@ include ../Makefile.tests_common
BOARD_INSUFFICIENT_MEMORY := airfy-beacon calliope-mini cc2650stk chronos maple-mini \
mbed_lpc1768 microbit msb-430 msb-430h nrf51dongle \
nrf6310 nucleo32-f031 nucleo32-f042 nucleo32-f303 \
nucleo-f030 nucleo-f070 nucleo-f072 nucleo-f103 \
nucleo-f334 nucleo-l053 nucleo-l073 opencm904 pca10000 \
pca10005 spark-core stm32f0discovery weio \
nucleo32-l031 nucleo-f030 nucleo-f070 nucleo-f072 \
nucleo-f103 nucleo-f334 nucleo-l053 nucleo-l073 opencm904 \
pca10000 pca10005 spark-core stm32f0discovery weio \
yunjia-nrf51822
DISABLE_MODULE += auto_init

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@ -5,8 +5,8 @@ BOARD_INSUFFICIENT_MEMORY := airfy-beacon arduino-duemilanove arduino-mega2560 \
arduino-uno arduino-zero calliope-mini cc2650stk \
chronos ek-lm4f120xl limifrog-v1 maple-mini microbit \
msb-430 msb-430h nrf51dongle nrf6310 nucleo32-f031 \
nucleo32-f042 nucleo32-f303 nucleo-f030 nucleo-f070 \
nucleo-f072 nucleo-f091 nucleo-f103 nucleo-f334 \
nucleo32-f042 nucleo32-f303 nucleo32-l031 nucleo-f030 \
nucleo-f070 nucleo-f072 nucleo-f091 nucleo-f103 nucleo-f334 \
nucleo-f410 nucleo-l053 nucleo-l073 opencm904 \
pba-d-01-kw2x pca10000 pca10005 remote-pa remote-reva \
remote-revb saml21-xpro samr21-xpro seeeduino_arch-pro \
@ -27,7 +27,7 @@ DISABLE_TEST_FOR_ARM7 := tests-relic
ARM_CORTEX_M_BOARDS := airfy-beacon arduino-due arduino-zero cc2538dk ek-lm4f120xl \
f4vi1 fox frdm-k64f iotlab-m3 limifrog-v1 mbed_lpc1768 msbiot \
mulle nrf51dongle nrf6310 nucleo32-f031 nucleo32-f303 \
mulle nrf51dongle nrf6310 nucleo32-f031 nucleo32-f303 nucleo32-l031 \
nucleo-f030 nucleo-f070 nucleo-f091 nucleo-f303 nucleo-f334 \
nucleo-f401 nucleo-f410 nucleo-f411 nucleo-l053 nucleo-l073 \
nucleo-l1 opencm904 openmote-cc2538 pba-d-01-kw2x pca10000 \