mirror of
https://github.com/RIOT-OS/RIOT.git
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cpu/kinetis_common: reworked PWM driver
This commit is contained in:
Hauke Petersen
parent
06b561f530
commit
d1db190f83
@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2015 Freie Universität Berlin
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* Copyright (C) 2015-2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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@ -61,6 +61,11 @@ typedef uint16_t gpio_t;
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*/
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#define GPIO_MODE(pu, pe, od, out) (pu | (pe << 1) | (od << 5) | (out << 7))
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/**
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* @brief Define the maximum number of PWM channels that can be configured
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*/
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#define PWM_CHAN_MAX (4U)
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#ifndef DOXYGEN
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/**
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* @brief Override GPIO modes
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@ -142,6 +147,18 @@ typedef enum {
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ADC_RES_16BIT = ADC_CFG1_MODE(3) /**< ADC resolution: 16 bit */
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} adc_res_t;
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/** @} */
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/**
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* @brief Override default PWM mode configuration
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* @{
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*/
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#define HAVE_PWM_MODE_T
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typedef enum {
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PWM_LEFT = (FTM_CnSC_MSB_MASK | FTM_CnSC_ELSB_MASK), /**< left aligned */
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PWM_RIGHT = (FTM_CnSC_MSB_MASK | FTM_CnSC_ELSA_MASK), /**< right aligned */
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PWM_CENTER = (FTM_CnSC_MSB_MASK) /**< center aligned */
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} pwm_mode_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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/**
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@ -186,12 +203,26 @@ typedef struct {
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uint8_t index;
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} lptmr_conf_t;
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/**
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* @brief PWM configuration structure
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*/
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typedef struct {
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FTM_Type* ftm; /**< used FTM */
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struct { /**< logical channel configuration */
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gpio_t pin; /**< GPIO pin used, set to GPIO_UNDEF */
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uint8_t af; /**< alternate function mapping */
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uint8_t ftm_chan; /**< the actual FTM channel used */
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} chan[PWM_CHAN_MAX];
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uint8_t chan_numof; /**< number of actually configured channels */
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uint8_t ftm_num; /**< FTM number used */
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} pwm_conf_t;
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/**
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* @brief Possible timer module types
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*/
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enum {
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TIMER_PIT,
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TIMER_LPTMR,
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TIMER_PIT, /**< PIT */
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TIMER_LPTMR, /**< LPTMR */
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};
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/**
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@ -1,11 +1,11 @@
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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* Copyright (C) 2014-2016 Freie Universität Berlin
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* Copyright (C) 2014 PHYTEC Messtechnik GmbH
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* Copyright (C) 2015-2016 Eistec AB
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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@ -24,375 +24,130 @@
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* @}
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*/
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#include <stdint.h>
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#include <string.h>
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#include "cpu.h"
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#include "assert.h"
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#include "periph/pwm.h"
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#include "periph_conf.h"
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/* FTM channel look up tables */
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#if PWM_0_EN
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static const uint8_t ftm0chan[] = {
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#if PWM_0_CHANNELS > 0
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PWM_0_CH0_FTMCHAN,
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#endif
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#if PWM_0_CHANNELS > 1
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PWM_0_CH1_FTMCHAN,
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#endif
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#if PWM_0_CHANNELS > 2
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PWM_0_CH2_FTMCHAN,
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#endif
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#if PWM_0_CHANNELS > 3
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PWM_0_CH3_FTMCHAN,
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#endif
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#if PWM_0_CHANNELS > 4
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PWM_0_CH4_FTMCHAN,
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#endif
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#if PWM_0_CHANNELS > 5
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PWM_0_CH5_FTMCHAN,
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#endif
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#if PWM_0_CHANNELS > 6
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PWM_0_CH6_FTMCHAN,
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#endif
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#if PWM_0_CHANNELS > 7
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PWM_0_CH7_FTMCHAN,
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#endif
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};
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#endif
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#if PWM_1_EN
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static const uint8_t ftm1chan[] = {
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#if PWM_1_CHANNELS > 0
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PWM_1_CH0_FTMCHAN,
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#endif
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#if PWM_1_CHANNELS > 1
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PWM_1_CH1_FTMCHAN,
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#endif
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#if PWM_1_CHANNELS > 2
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PWM_1_CH2_FTMCHAN,
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#endif
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#if PWM_1_CHANNELS > 3
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PWM_1_CH3_FTMCHAN,
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#endif
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#if PWM_1_CHANNELS > 4
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PWM_1_CH4_FTMCHAN,
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#endif
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#if PWM_1_CHANNELS > 5
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PWM_1_CH5_FTMCHAN,
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#endif
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#if PWM_1_CHANNELS > 6
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PWM_1_CH6_FTMCHAN,
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#endif
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#if PWM_1_CHANNELS > 7
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PWM_1_CH7_FTMCHAN,
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#endif
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};
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#endif
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#define PRESCALER_MAX (7U)
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uint32_t pwm_init(pwm_t dev, pwm_mode_t mode, uint32_t freq, uint16_t res)
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static inline FTM_Type *ftm(pwm_t pwm)
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{
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FTM_Type *ftm;
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int channels = 0;
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uint32_t pwm_clk = 0;
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const uint8_t *ftmchan = NULL;
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return pwm_config[pwm].ftm;
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}
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switch (dev) {
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#if PWM_0_EN
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uint32_t pwm_init(pwm_t pwm, pwm_mode_t mode, uint32_t freq, uint16_t res)
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{
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uint8_t pre = 0;
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case PWM_0:
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channels = PWM_0_CHANNELS;
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pwm_clk = PWM_0_CLK;
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ftm = PWM_0_DEV;
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ftmchan = &ftm0chan[0];
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break;
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#endif
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#if PWM_1_EN
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case PWM_1:
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channels = PWM_1_CHANNELS;
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pwm_clk = PWM_1_CLK;
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ftm = PWM_1_DEV;
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ftmchan = &ftm1chan[0];
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break;
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#endif
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default:
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return 0;
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}
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switch (mode) {
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case PWM_LEFT:
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case PWM_RIGHT:
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case PWM_CENTER:
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break;
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default:
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return 0;
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}
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if ((unsigned int)res > (PWM_MAX_VALUE + 1) || (res * freq) > pwm_clk) {
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if (pwm >= PWM_NUMOF || ((res * freq) > CLOCK_BUSCLOCK)) {
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return 0;
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}
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/* Try to find a good prescaler value */
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/* The prescaler divides the module clock by a power of two, between 2^0 and 2^7 */
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uint8_t prescaler = 0;
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/* (resolution * frequency) is the number of timer ticks per second */
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while ((pwm_clk >> prescaler) > (res * freq)) {
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++prescaler;
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if (prescaler > 7) {
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/* Module clock is too fast to reach the requested frequency using the
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* hardware supported prescaler values */
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/* Note: The frequency might be reachable if the requested resolution
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* is increased. */
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return 0;
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}
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/* figure out the clock settings
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* the resulting frequency is calculated by
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* ticks := BUS_CLK / 2 ^ pre
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* where `ticks` is `freq * res`
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* and `pre` must be between [0, 7].
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*
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* The resulting prescaler yields a timer frequency, which is the closest
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* possible frequency requested. */
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while ((CLOCK_BUSCLOCK >> pre) > (res * freq)) {
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++pre;
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}
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/* The chosen prescaler yields a timer frequency which is the
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* nearest possible frequency less than the requested frequency */
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/* Turn on the peripheral */
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pwm_poweron(dev);
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switch (dev) {
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#if PWM_0_EN
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case PWM_0:
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#if PWM_0_CHANNELS > 0
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gpio_init_port(PWM_0_CH0_GPIO, PORT_PCR_MUX(PWM_0_CH0_AF));
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#endif
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#if PWM_0_CHANNELS > 1
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gpio_init_port(PWM_0_CH1_GPIO, PORT_PCR_MUX(PWM_0_CH1_AF));
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#endif
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#if PWM_0_CHANNELS > 2
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gpio_init_port(PWM_0_CH2_GPIO, PORT_PCR_MUX(PWM_0_CH2_AF));
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#endif
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#if PWM_0_CHANNELS > 3
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gpio_init_port(PWM_0_CH3_GPIO, PORT_PCR_MUX(PWM_0_CH3_AF));
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#endif
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#if PWM_0_CHANNELS > 4
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gpio_init_port(PWM_0_CH4_GPIO, PORT_PCR_MUX(PWM_0_CH4_AF));
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#endif
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#if PWM_0_CHANNELS > 5
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gpio_init_port(PWM_0_CH5_GPIO, PORT_PCR_MUX(PWM_0_CH5_AF));
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#endif
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#if PWM_0_CHANNELS > 6
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gpio_init_port(PWM_0_CH6_GPIO, PORT_PCR_MUX(PWM_0_CH6_AF));
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#endif
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#if PWM_0_CHANNELS > 7
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gpio_init_port(PWM_0_CH7_GPIO, PORT_PCR_MUX(PWM_0_CH7_AF));
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#endif
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break;
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#endif
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#if PWM_1_EN
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case PWM_1:
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#if PWM_1_CHANNELS > 0
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gpio_init_port(PWM_1_CH0_GPIO, PORT_PCR_MUX(PWM_1_CH0_AF));
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#endif
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#if PWM_1_CHANNELS > 1
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gpio_init_port(PWM_1_CH1_GPIO, PORT_PCR_MUX(PWM_1_CH1_AF));
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#endif
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#if PWM_1_CHANNELS > 2
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gpio_init_port(PWM_1_CH2_GPIO, PORT_PCR_MUX(PWM_1_CH2_AF));
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#endif
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#if PWM_1_CHANNELS > 3
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gpio_init_port(PWM_1_CH3_GPIO, PORT_PCR_MUX(PWM_1_CH3_AF));
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#endif
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#if PWM_1_CHANNELS > 4
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gpio_init_port(PWM_1_CH4_GPIO, PORT_PCR_MUX(PWM_1_CH4_AF));
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#endif
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#if PWM_1_CHANNELS > 5
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gpio_init_port(PWM_1_CH5_GPIO, PORT_PCR_MUX(PWM_1_CH5_AF));
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#endif
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#if PWM_1_CHANNELS > 6
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gpio_init_port(PWM_1_CH6_GPIO, PORT_PCR_MUX(PWM_1_CH6_AF));
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#endif
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#if PWM_1_CHANNELS > 7
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gpio_init_port(PWM_1_CH7_GPIO, PORT_PCR_MUX(PWM_1_CH7_AF));
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#endif
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break;
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#endif
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default:
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return 0;
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/* make sure the calculated prescaler is valid, else return */
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if (pre > PRESCALER_MAX) {
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return 0;
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}
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/* configure the used timer */
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pwm_poweron(pwm);
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/* disable write protect for changing settings */
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ftm->MODE = FTM_MODE_WPDIS_MASK;
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ftm(pwm)->MODE = FTM_MODE_WPDIS_MASK;
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/* clear any existing configuration */
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ftm(pwm)->COMBINE = 0;
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ftm(pwm)->CNTIN = 0;
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ftm(pwm)->SWOCTRL = 0;
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/* apply prescaler and set resolution */
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ftm(pwm)->SC = FTM_SC_PS(pre);
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ftm(pwm)->MOD = (res - 1);
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/* reset timer match value */
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for (int i = 0; i < channels; i++) {
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ftm->CONTROLS[i].CnV = 0;
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/* set CPWMS bit in the SC register in case of center aligned mode */
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if (mode == PWM_CENTER) {
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BITBAND_REG32(ftm(pwm)->SC, FTM_SC_CPWMS_SHIFT) = 1;
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}
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/* reset timer configuration registers */
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ftm->COMBINE = 0;
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ftm->CNTIN = 0;
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ftm->SWOCTRL = 0;
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/* set prescale and mod registers to matching values for resolution and frequency */
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ftm->SC = FTM_SC_PS(prescaler);
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ftm->MOD = res - 1;
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/* set PWM mode */
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uint32_t mode_mask = 0;
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switch (mode) {
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case PWM_LEFT:
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mode_mask = (1 << FTM_CnSC_MSB_SHIFT) | (1 << FTM_CnSC_ELSB_SHIFT);
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break;
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case PWM_RIGHT:
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mode_mask = (1 << FTM_CnSC_MSB_SHIFT) | (1 << FTM_CnSC_ELSA_SHIFT);
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break;
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case PWM_CENTER:
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mode_mask = (1 << FTM_CnSC_MSB_SHIFT);
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ftm->SC |= (1 << FTM_SC_CPWMS_SHIFT);
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break;
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}
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for (int i = 0; i < channels; i++) {
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/* cppcheck thinks ftmchan may be NULL here, but the variable is
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* assigned in all non-returning branches of the switch at the top of
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* this function. */
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/* cppcheck-suppress nullPointer ftmchan */
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ftm->CONTROLS[ftmchan[i]].CnSC = mode_mask;
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/* setup the configured channels */
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for (int i = 0; i < (int)pwm_config[pwm].chan_numof; i++) {
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/* configure the used pin */
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gpio_init_port(pwm_config[pwm].chan[i].pin,
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PORT_PCR_MUX(pwm_config[pwm].chan[i].af));
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/* set the given mode */
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ftm(pwm)->CONTROLS[pwm_config[pwm].chan[i].ftm_chan].CnSC = mode;
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/* and reset the PWM to 0% duty cycle */
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ftm(pwm)->CONTROLS[pwm_config[pwm].chan[i].ftm_chan].CnV = 0;
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}
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/* enable timer ergo the PWM generation */
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pwm_start(dev);
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/* and now we start the actual waveform generation */
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pwm_start(pwm);
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/* Return actual frequency */
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return (pwm_clk / (1 << prescaler)) / res;
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/* finally we need to return the actual applied PWM frequency */
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return (CLOCK_BUSCLOCK >> pre) / res;
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}
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uint8_t pwm_channels(pwm_t dev)
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uint8_t pwm_channels(pwm_t pwm)
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{
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switch (dev) {
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#if PWM_0_EN
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case PWM_0:
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return PWM_0_CHANNELS;
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#endif
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#if PWM_1_EN
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case PWM_1:
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return PWM_1_CHANNELS;
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#endif
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default:
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return 0;
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}
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assert(pwm < PWM_NUMOF);
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return pwm_config[pwm].chan_numof;
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}
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void pwm_set(pwm_t dev, uint8_t channel, uint16_t value)
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void pwm_set(pwm_t pwm, uint8_t channel, uint16_t value)
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{
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FTM_Type *ftm;
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const uint8_t *ftmchan = NULL;
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switch (dev) {
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#if PWM_0_EN
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case PWM_0:
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if (channel > PWM_0_CHANNELS) {
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return;
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}
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ftm = PWM_0_DEV;
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ftmchan = &ftm0chan[0];
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break;
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#endif
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#if PWM_1_EN
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case PWM_1:
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if (channel > PWM_1_CHANNELS) {
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return;
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}
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ftm = PWM_1_DEV;
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ftmchan = &ftm1chan[0];
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break;
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#endif
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default:
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return;
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}
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/* clamp value to maximum possible value */
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if (value > PWM_MAX_VALUE) {
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value = PWM_MAX_VALUE;
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}
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/* cppcheck thinks ftmchan may be NULL here, but the variable is
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* assigned in all non-returning branches of the switch at the top of
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* this function. */
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/* cppcheck-suppress nullPointer */
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ftm->CONTROLS[ftmchan[channel]].CnV = value;
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assert((pwm < PWM_NUMOF) && (channel < pwm_config[pwm].chan_numof));
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ftm(pwm)->CONTROLS[pwm_config[pwm].chan[channel].ftm_chan].CnV = value;
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}
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void pwm_start(pwm_t dev)
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void pwm_start(pwm_t pwm)
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{
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switch (dev) {
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#if PWM_0_EN
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case PWM_0:
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PWM_0_DEV->SC |= FTM_SC_CLKS(1);
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break;
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#endif
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#if PWM_1_EN
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case PWM_1:
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PWM_1_DEV->SC |= FTM_SC_CLKS(1);
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break;
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#endif
|
||||
}
|
||||
assert(pwm < PWM_NUMOF);
|
||||
ftm(pwm)->SC |= FTM_SC_CLKS(1);
|
||||
}
|
||||
|
||||
void pwm_stop(pwm_t dev)
|
||||
void pwm_stop(pwm_t pwm)
|
||||
{
|
||||
switch (dev) {
|
||||
#if PWM_0_EN
|
||||
|
||||
case PWM_0:
|
||||
PWM_0_DEV->SC &= ~FTM_SC_CLKS_MASK;
|
||||
break;
|
||||
#endif
|
||||
#if PWM_1_EN
|
||||
|
||||
case PWM_1:
|
||||
PWM_1_DEV->SC &= ~FTM_SC_CLKS_MASK;
|
||||
break;
|
||||
#endif
|
||||
}
|
||||
assert(pwm < PWM_NUMOF);
|
||||
ftm(pwm)->SC &= ~(FTM_SC_CLKS_MASK);
|
||||
}
|
||||
|
||||
void pwm_poweron(pwm_t dev)
|
||||
void pwm_poweron(pwm_t pwm)
|
||||
{
|
||||
switch (dev) {
|
||||
#if PWM_0_EN
|
||||
assert(pwm < PWM_NUMOF);
|
||||
int ftm = pwm_config[pwm].ftm_num;
|
||||
|
||||
case PWM_0:
|
||||
PWM_0_CLKEN();
|
||||
break;
|
||||
#endif
|
||||
#if PWM_1_EN
|
||||
|
||||
case PWM_1:
|
||||
PWM_1_CLKEN();
|
||||
break;
|
||||
#endif
|
||||
#ifdef SIM_SCGC6_FTM2_SHIFT
|
||||
BITBAND_REG32(SIM->SCGC6, SIM_SCGC6_FTM0_SHIFT + ftm) = 1;
|
||||
#else
|
||||
if (ftm < 2) {
|
||||
BITBAND_REG32(SIM->SCGC6, SIM_SCGC6_FTM0_SHIFT + ftm) = 1;
|
||||
}
|
||||
else if (ftm == 2) {
|
||||
BITBAND_REG32(SIM->SCGC3, SIM_SCGC3_FTM2_SHIFT) = 1;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void pwm_poweroff(pwm_t dev)
|
||||
void pwm_poweroff(pwm_t pwm)
|
||||
{
|
||||
switch (dev) {
|
||||
#if PWM_0_EN
|
||||
assert(pwm < PWM_NUMOF);
|
||||
int ftm = pwm_config[pwm].ftm_num;
|
||||
|
||||
case PWM_0:
|
||||
PWM_0_CLKDIS();
|
||||
break;
|
||||
#endif
|
||||
#if PWM_1_EN
|
||||
|
||||
case PWM_1:
|
||||
PWM_1_CLKDIS();
|
||||
break;
|
||||
#endif
|
||||
#ifdef SIM_SCGC6_FTM2_SHIFT
|
||||
BITBAND_REG32(SIM->SCGC6, SIM_SCGC6_FTM0_SHIFT + ftm) = 0;
|
||||
#else
|
||||
if (ftm < 2) {
|
||||
BITBAND_REG32(SIM->SCGC6, SIM_SCGC6_FTM0_SHIFT + ftm) = 0;
|
||||
}
|
||||
else if (ftm == 2) {
|
||||
BITBAND_REG32(SIM->SCGC3, SIM_SCGC3_FTM2_SHIFT) = 0;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user