From d396f1f0c2eb7e8f596e04126193b3e50dc8f21d Mon Sep 17 00:00:00 2001 From: Hauke Petersen Date: Wed, 5 Nov 2014 16:13:57 +0100 Subject: [PATCH] board/iot-lab_M3: configured GPIOs correctly --- boards/iot-lab_M3/include/board.h | 22 +++++ boards/iot-lab_M3/include/periph_conf.h | 124 ++++++++++++------------ 2 files changed, 86 insertions(+), 60 deletions(-) diff --git a/boards/iot-lab_M3/include/board.h b/boards/iot-lab_M3/include/board.h index 53cd4ac22f..8ef122345e 100644 --- a/boards/iot-lab_M3/include/board.h +++ b/boards/iot-lab_M3/include/board.h @@ -65,6 +65,16 @@ extern "C" { #define AT86RF231_SLEEP GPIO_14 /** @} */ +/** + * @name Define the interface for the connected flash memory + * @{ + */ +#define EXTFLASH_SPI SPI_1 +#define EXTFLASH_CS GPIO_8 +#define EXTFLASH_WRITE GPIO_9 +#define EXTFLASH_HOLD GPIO_10 +/** @} */ + /** * @name Define the interface to the ISL29020 light sensor * @{ @@ -81,6 +91,18 @@ extern "C" { #define LPS331AP_ADDR 0x5c /** @} */ +/** + * @name Define the interface to the LSM303DLHC accelerometer and magnetometer + * @{ + */ +#define LSM303DLHC_I2C I2C_0 +#define LSM303DLHC_ACC_ADDR (25) +#define LSM303DLHC_MAG_ADDR (30) +#define LSM303DLHC_INT1 GPIO_5 +#define LSM303DLHC_INT2 GPIO_6 +#define LSM303DLHC_DRDY GPIO_7 +/** @} */ + /** * @name LED pin definitions * @{ diff --git a/boards/iot-lab_M3/include/periph_conf.h b/boards/iot-lab_M3/include/periph_conf.h index 65a14ec82b..32efefb763 100644 --- a/boards/iot-lab_M3/include/periph_conf.h +++ b/boards/iot-lab_M3/include/periph_conf.h @@ -116,7 +116,7 @@ extern "C" { /** * @brief GPIO configuration */ -#define GPIO_NUMOF 15 +#define GPIO_NUMOF 16 #define GPIO_0_EN 1 #define GPIO_1_EN 1 #define GPIO_2_EN 1 @@ -132,6 +132,7 @@ extern "C" { #define GPIO_12_EN 1 #define GPIO_13_EN 1 #define GPIO_14_EN 1 +#define GPIO_15_EN 1 #define GPIO_IRQ_PRIO 1 /** @@ -141,110 +142,113 @@ extern "C" { * service routines to call the correct callbacks. * GPIO_IRQ_x where x matches the value defined by GPIO_y_PIN */ -#define GPIO_IRQ_1 GPIO_13 -#define GPIO_IRQ_2 GPIO_14 +#define GPIO_IRQ_0 GPIO_4 +#define GPIO_IRQ_1 GPIO_6 +#define GPIO_IRQ_2 GPIO_7 #define GPIO_IRQ_3 GPIO_0 #define GPIO_IRQ_4 GPIO_12 -#define GPIO_IRQ_5 GPIO_8 +#define GPIO_IRQ_5 GPIO_3 #define GPIO_IRQ_6 GPIO_9 -#define GPIO_IRQ_7 GPIO_5 -#define GPIO_IRQ_8 GPIO_1 -#define GPIO_IRQ_9 GPIO_4 -#define GPIO_IRQ_11 GPIO_7 -#define GPIO_IRQ_12 GPIO_2 -#define GPIO_IRQ_13 GPIO_9 -#define GPIO_IRQ_14 GPIO_10 +#define GPIO_IRQ_9 GPIO_10 +#define GPIO_IRQ_11 GPIO_8 +#define GPIO_IRQ_12 GPIO_5 /* GPIO channel 0 config */ -#define GPIO_0_PORT GPIOA /* Used for user button 1 */ +#define GPIO_0_PORT GPIOA /* user pin 1 */ #define GPIO_0_PIN 3 #define GPIO_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN) #define GPIO_0_EXTI_CFG() (AFIO->EXTICR[0] |= AFIO_EXTICR1_EXTI3_PA) #define GPIO_0_IRQ EXTI3_IRQn /* GPIO channel 1 config */ -#define GPIO_1_PORT GPIOA -#define GPIO_1_PIN 8 -#define GPIO_1_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN) -#define GPIO_1_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI8_PA) +#define GPIO_1_PORT GPIOB /* user pin 2 */ +#define GPIO_1_PIN 9 +#define GPIO_1_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) +#define GPIO_1_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI9_PB) #define GPIO_1_IRQ EXTI9_5_IRQn /* GPIO channel 2 config */ -#define GPIO_2_PORT GPIOB -#define GPIO_2_PIN 12 -#define GPIO_2_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) -#define GPIO_2_EXTI_CFG() (AFIO->EXTICR[3] |= AFIO_EXTICR4_EXTI12_PB) +#define GPIO_2_PORT GPIOC /* user pin 3, DO NOT USE AS EXTI */ +#define GPIO_2_PIN 11 +#define GPIO_2_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) +#define GPIO_2_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI11_PC) #define GPIO_2_IRQ EXTI15_10_IRQn /* GPIO channel 3 config */ -#define GPIO_3_PORT GPIOB -#define GPIO_3_PIN 8 -#define GPIO_3_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) -#define GPIO_3_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI8_PB) +#define GPIO_3_PORT GPIOC /* l3g4200d: int1 */ +#define GPIO_3_PIN 5 +#define GPIO_3_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) +#define GPIO_3_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI5_PC) #define GPIO_3_IRQ EXTI9_5_IRQn /* GPIO channel 4 config */ -#define GPIO_4_PORT GPIOB -#define GPIO_4_PIN 9 -#define GPIO_4_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) -#define GPIO_4_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI9_PB) -#define GPIO_4_IRQ EXTI9_5_IRQn +#define GPIO_4_PORT GPIOC /* l3g4200d: int2/drdy */ +#define GPIO_4_PIN 0 +#define GPIO_4_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) +#define GPIO_4_EXTI_CFG() (AFIO->EXTICR[0] |= AFIO_EXTICR1_EXTI0_PC) +#define GPIO_4_IRQ EXTI0_IRQn /* GPIO channel 5 config */ -#define GPIO_5_PORT GPIOC -#define GPIO_5_PIN 7 -#define GPIO_5_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) -#define GPIO_5_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI7_PC) -#define GPIO_5_IRQ EXTI9_5_IRQn +#define GPIO_5_PORT GPIOB /* lsm303dlhc: int1 */ +#define GPIO_5_PIN 12 +#define GPIO_5_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) +#define GPIO_5_EXTI_CFG() (AFIO->EXTICR[3] |= AFIO_EXTICR4_EXTI12_PB) +#define GPIO_5_IRQ EXTI15_10_IRQn /* GPIO channel 6 config */ -#define GPIO_6_PORT GPIOC -#define GPIO_6_PIN 8 -#define GPIO_6_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) -#define GPIO_6_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI8_PC) -#define GPIO_6_IRQ EXTI9_5_IRQn +#define GPIO_6_PORT GPIOB /* lsm303dlhc: int2 */ +#define GPIO_6_PIN 1 +#define GPIO_6_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) +#define GPIO_6_EXTI_CFG() (AFIO->EXTICR[0] |= AFIO_EXTICR1_EXTI1_PB) +#define GPIO_6_IRQ EXTI1_IRQn /* GPIO channel 7 config */ -#define GPIO_7_PORT GPIOC -#define GPIO_7_PIN 11 -#define GPIO_7_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) -#define GPIO_7_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI11_PC) -#define GPIO_7_IRQ EXTI15_10_IRQn +#define GPIO_7_PORT GPIOB /* lsm303dlhc: drdy */ +#define GPIO_7_PIN 2 +#define GPIO_7_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) +#define GPIO_7_EXTI_CFG() (AFIO->EXTICR[0] |= AFIO_EXTICR1_EXTI2_PB) +#define GPIO_7_IRQ EXTI2_IRQn /* GPIO channel 8 config */ -#define GPIO_8_PORT GPIOB -#define GPIO_8_PIN 2 -#define GPIO_8_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) -#define GPIO_8_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR1_EXTI2_PB) -#define GPIO_8_IRQ EXTI2_IRQn +#define GPIO_8_PORT GPIOA /* flash: cs */ +#define GPIO_8_PIN 11 +#define GPIO_8_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN) +#define GPIO_8_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI11_PA) +#define GPIO_8_IRQ EXTI15_10_IRQn /* GPIO channel 9 config */ -#define GPIO_9_PORT GPIOA +#define GPIO_9_PORT GPIOC /* flash: write */ #define GPIO_9_PIN 6 -#define GPIO_9_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN) -#define GPIO_9_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI6_PA) +#define GPIO_9_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) +#define GPIO_9_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI6_PC) #define GPIO_9_IRQ EXTI9_5_IRQn /* GPIO channel 10 config */ -#define GPIO_10_PORT GPIOA -#define GPIO_10_PIN 7 -#define GPIO_10_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN) -#define GPIO_10_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI7_PA) +#define GPIO_10_PORT GPIOC /* flash: hold */ +#define GPIO_10_PIN 9 +#define GPIO_10_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) +#define GPIO_10_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI9_PC) #define GPIO_10_IRQ EXTI9_5_IRQn /* GPIO channel 11 config */ -#define GPIO_11_PORT GPIOA +#define GPIO_11_PORT GPIOA /* radio: cs */ #define GPIO_11_PIN 4 #define GPIO_11_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN) #define GPIO_11_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI4_PA) #define GPIO_11_IRQ EXTI4_IRQn /* GPIO channel 12 config */ -#define GPIO_12_PORT GPIOC +#define GPIO_12_PORT GPIOC /* radio: int */ #define GPIO_12_PIN 4 #define GPIO_12_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) #define GPIO_12_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI4_PC) #define GPIO_12_IRQ EXTI4_IRQn /* GPIO channel 13 config */ -#define GPIO_13_PORT GPIOC +#define GPIO_13_PORT GPIOC /* radio: reset */ #define GPIO_13_PIN 1 #define GPIO_13_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) #define GPIO_13_EXTI_CFG() (AFIO->EXTICR[0] |= AFIO_EXTICR1_EXTI1_PC) #define GPIO_13_IRQ EXTI1_IRQn /* GPIO channel 14 config */ -#define GPIO_14_PORT GPIOA +#define GPIO_14_PORT GPIOA /* radio: sleep */ #define GPIO_14_PIN 2 #define GPIO_14_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN) #define GPIO_14_EXTI_CFG() (AFIO->EXTICR[0] |= AFIO_EXTICR1_EXTI2_PA) #define GPIO_14_IRQ EXTI2_IRQn +/* GPIO channel 14 config */ +#define GPIO_15_PORT GPIOC /* battery feedback */ +#define GPIO_15_PIN 13 +#define GPIO_15_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) +#define GPIO_15_EXTI_CFG() (AFIO->EXTICR[3] |= AFIO_EXTICR4_EXTI13_PC) +#define GPIO_15_IRQ EXTI15_10_IRQn /** * @brief SPI configuration