From d6aeea7e75361010958c60fc484f482e2097789a Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Wed, 20 Jul 2022 17:18:42 +0200 Subject: [PATCH] cpu/esp32: rename architecture to riscv_esp32 to rv32 --- cpu/esp32/Makefile.include | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cpu/esp32/Makefile.include b/cpu/esp32/Makefile.include index fe723ed6bb..4670311f95 100644 --- a/cpu/esp32/Makefile.include +++ b/cpu/esp32/Makefile.include @@ -22,7 +22,7 @@ include $(RIOTCPU)/esp_common/Makefile.include ifeq (xtensa,$(CPU_ARCH)) TARGET_ARCH ?= xtensa-$(CPU_FAM)-elf -else ifeq (riscv_esp32,$(CPU_ARCH)) +else ifeq (rv32,$(CPU_ARCH)) TARGET_ARCH ?= riscv32-esp-elf else $(error Unkwnown ESP32x SoC architecture)