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cpu/nrf51822: optimization of startup code
- make use of common startup code - make use of common exception handlers - renamed startup.c to vectors.c
This commit is contained in:
Hauke Petersen
parent
37078856e7
commit
db1ee85d8b
@ -1,191 +0,0 @@
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_nrf51822
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* @{
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*
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* @file
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* @brief Startup code and interrupt vector definition
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include <stdint.h>
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#include "board.h"
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#include "cpu.h"
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#include "panic.h"
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/**
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* memory markers as defined in the linker script
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*/
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extern uint32_t _sfixed;
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extern uint32_t _efixed;
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extern uint32_t _etext;
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extern uint32_t _srelocate;
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extern uint32_t _erelocate;
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extern uint32_t _szero;
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extern uint32_t _ezero;
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extern uint32_t _sstack;
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extern uint32_t _estack;
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/**
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* @brief functions for initializing the board, std-lib and kernel
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*/
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extern void board_init(void);
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extern void kernel_init(void);
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extern void __libc_init_array(void);
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/**
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* @brief This function is the entry point after a system reset
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*
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* After a system reset, the following steps are necessary and carried out:
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* 1. load data section from flash to ram
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* 2. overwrite uninitialized data section (BSS) with zeros
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* 3. initialize the newlib
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* 4. initialize the board (sync clock, setup std-IO)
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* 5. initialize and start RIOTs kernel
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*/
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void reset_handler(void)
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{
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uint32_t *dst;
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uint32_t *src = &_etext;
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/* make sure all RAM blocks are turned on
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* -> see NRF51822 Product Anomaly Notice (PAN) #16 for more details
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*/
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NRF_POWER->RAMON = 0xf;
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/* load data section from flash to ram */
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for (dst = &_srelocate; dst < &_erelocate; ) {
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*(dst++) = *(src++);
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}
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/* default bss section to zero */
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for (dst = &_szero; dst < &_ezero; ) {
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*(dst++) = 0;
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}
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/* initialize the board and startup the kernel */
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board_init();
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/* initialize std-c library (this should be done after board_init) */
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__libc_init_array();
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/* startup the kernel */
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kernel_init();
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}
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/**
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* @brief Default handler is called in case no interrupt handler was defined
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*/
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void dummy_handler(void)
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{
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core_panic(PANIC_DUMMY_HANDLER, "DUMMY ISR HANDLER");
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}
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void isr_nmi(void)
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{
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core_panic(PANIC_NMI_HANDLER, "NMI HANDLER");
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}
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void isr_hard_fault(void)
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{
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core_panic(PANIC_HARD_FAULT, "HARD FAULT");
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}
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/* Cortex-M specific interrupt vectors */
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void isr_svc(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_pendsv(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_systick(void) __attribute__ ((weak, alias("dummy_handler")));
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/* nRF51822qfaa specific interrupt vector */
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void isr_power_clock(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_radio(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_uart0(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_spi0_twi0(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_spi1_twi1(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_gpiote(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_adc(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_timer0(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_timer1(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_timer2(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_rtc0(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_temp(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_rng(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_ecb(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_ccm_aar(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_wdt(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_rtc1(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_qdec(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_lpcomp(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_swi0(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_swi1(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_swi2(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_swi3(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_swi4(void) __attribute__ ((weak, alias("dummy_handler")));
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void isr_swi5(void) __attribute__ ((weak, alias("dummy_handler")));
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/* interrupt vector table */
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__attribute__ ((section(".vectors")))
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const void *interrupt_vector[] = {
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/* Stack pointer */
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(void*) (&_estack), /* pointer to the top of the empty stack */
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/* Cortex-M handlers */
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(void*) reset_handler, /* entry point of the program */
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(void*) isr_nmi, /* non maskable interrupt handler */
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(void*) isr_hard_fault, /* if you end up here its not good */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) isr_svc, /* system call interrupt */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) isr_pendsv, /* pendSV interrupt, used for task switching in RIOT */
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(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
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/* nRF51 specific peripheral handlers */
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(void*) isr_power_clock, /* power_clock */
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(void*) isr_radio, /* radio */
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(void*) isr_uart0, /* uart0 */
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(void*) isr_spi0_twi0, /* spi0_twi0 */
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(void*) isr_spi1_twi1, /* spi1_twi1 */
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(void*) (0UL), /* reserved */
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(void*) isr_gpiote, /* gpiote */
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(void*) isr_adc, /* adc */
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(void*) isr_timer0, /* timer0 */
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(void*) isr_timer1, /* timer1 */
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(void*) isr_timer2, /* timer2 */
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(void*) isr_rtc0, /* rtc0 */
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(void*) isr_temp, /* temp */
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(void*) isr_rng, /* rng */
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(void*) isr_ecb, /* ecb */
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(void*) isr_ccm_aar, /* ccm_aar */
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(void*) isr_wdt, /* wdt */
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(void*) isr_rtc1, /* rtc1 */
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(void*) isr_qdec, /* qdec */
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(void*) isr_lpcomp, /* lpcomp */
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(void*) isr_swi0, /* swi0 */
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(void*) isr_swi1, /* swi1 */
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(void*) isr_swi2, /* swi2 */
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(void*) isr_swi3, /* swi3 */
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(void*) isr_swi4, /* swi4 */
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(void*) isr_swi5, /* swi5 */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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};
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127
cpu/nrf51822/vectors.c
Normal file
127
cpu/nrf51822/vectors.c
Normal file
@ -0,0 +1,127 @@
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/*
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* Copyright (C) 2014-2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_nrf51822
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* @{
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*
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* @file
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* @brief Interrupt vector definitions
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include <stdint.h>
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#include "cpu.h"
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#include "vectors_cortexm.h"
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/* get the start of the ISR stack as defined in the linkerscript */
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extern uint32_t _estack;
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/* define a local dummy handler as it needs to be in the same compilation unit
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* as the alias definition */
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void dummy_handler(void) {
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dummy_handler_default();
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}
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void pre_startup(void)
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{
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/* make sure all RAM blocks are turned on
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* -> see NRF51822 Product Anomaly Notice (PAN) #16 for more details */
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NRF_POWER->RAMON = 0xf;
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}
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/* Cortex-M common interrupt vectors */
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WEAK_DEFAULT void isr_svc(void);
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WEAK_DEFAULT void isr_pendsv(void);
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WEAK_DEFAULT void isr_systick(void);
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/* nRF51822 specific interrupt vectors */
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WEAK_DEFAULT void isr_power_clock(void);
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WEAK_DEFAULT void isr_radio(void);
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WEAK_DEFAULT void isr_uart0(void);
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WEAK_DEFAULT void isr_spi0_twi0(void);
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WEAK_DEFAULT void isr_spi1_twi1(void);
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WEAK_DEFAULT void isr_gpiote(void);
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WEAK_DEFAULT void isr_adc(void);
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WEAK_DEFAULT void isr_timer0(void);
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WEAK_DEFAULT void isr_timer1(void);
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WEAK_DEFAULT void isr_timer2(void);
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WEAK_DEFAULT void isr_rtc0(void);
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WEAK_DEFAULT void isr_temp(void);
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WEAK_DEFAULT void isr_rng(void);
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WEAK_DEFAULT void isr_ecb(void);
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WEAK_DEFAULT void isr_ccm_aar(void);
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WEAK_DEFAULT void isr_wdt(void);
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WEAK_DEFAULT void isr_rtc1(void);
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WEAK_DEFAULT void isr_qdec(void);
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WEAK_DEFAULT void isr_lpcomp(void);
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WEAK_DEFAULT void isr_swi0(void);
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WEAK_DEFAULT void isr_swi1(void);
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WEAK_DEFAULT void isr_swi2(void);
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WEAK_DEFAULT void isr_swi3(void);
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WEAK_DEFAULT void isr_swi4(void);
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WEAK_DEFAULT void isr_swi5(void);
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/* interrupt vector table */
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ISR_VECTORS const void *interrupt_vector[] = {
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/* Exception stack pointer */
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(void*) (&_estack), /* pointer to the top of the stack */
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/* Cortex-M0 handlers */
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(void*) reset_handler_default, /* entry point of the program */
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(void*) nmi_default, /* non maskable interrupt handler */
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(void*) hard_fault_default, /* hard fault exception */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) isr_svc, /* system call interrupt, in RIOT used for
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* switching into thread context on boot */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
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* context switching is happening here */
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(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
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/* nRF51 specific peripheral handlers */
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(void*) isr_power_clock, /* power_clock */
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(void*) isr_radio, /* radio */
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(void*) isr_uart0, /* uart0 */
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(void*) isr_spi0_twi0, /* spi0_twi0 */
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(void*) isr_spi1_twi1, /* spi1_twi1 */
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(void*) (0UL), /* reserved */
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(void*) isr_gpiote, /* gpiote */
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(void*) isr_adc, /* adc */
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(void*) isr_timer0, /* timer0 */
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(void*) isr_timer1, /* timer1 */
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(void*) isr_timer2, /* timer2 */
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(void*) isr_rtc0, /* rtc0 */
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(void*) isr_temp, /* temp */
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(void*) isr_rng, /* rng */
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(void*) isr_ecb, /* ecb */
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(void*) isr_ccm_aar, /* ccm_aar */
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(void*) isr_wdt, /* wdt */
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(void*) isr_rtc1, /* rtc1 */
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(void*) isr_qdec, /* qdec */
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(void*) isr_lpcomp, /* lpcomp */
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(void*) isr_swi0, /* swi0 */
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(void*) isr_swi1, /* swi1 */
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(void*) isr_swi2, /* swi2 */
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(void*) isr_swi3, /* swi3 */
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(void*) isr_swi4, /* swi4 */
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(void*) isr_swi5, /* swi5 */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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(void*) (0UL), /* reserved */
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};
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