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cortexm_common: Introduce bitbanding macros
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Joakim Nohlgård
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231
cpu/cortexm_common/include/bit.h
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231
cpu/cortexm_common/include/bit.h
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/*
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* Copyright (C) 2017 Eistec AB
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_cortexm_common
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* @{
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*
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* @file
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* @brief Bit access macros for Cortex-M based CPUs
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*
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* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
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*/
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#ifndef BIT_H
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#define BIT_H
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#include <stdint.h>
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#include "cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Define BITBAND_FUNCTIONS_PROVIDED 1 if the CPU provides its own
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* implementations for bit manipulation */
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#if !BITBAND_FUNCTIONS_PROVIDED
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#if DOXYGEN
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/** @brief Flag for telling if the CPU has hardware bit band support */
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#define CPU_HAS_BITBAND 1 || 0 (1 for Cortex-M3 and up, 0 for Cortex-M0)
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#endif
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#ifndef CPU_HAS_BITBAND
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#if (__CORTEX_M >= 3)
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#define CPU_HAS_BITBAND 1
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#else
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#define CPU_HAS_BITBAND 0
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#endif
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#endif
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#if CPU_HAS_BITBAND || DOXYGEN
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/* Cortex-M3 and higher provide a bitband address space for atomically accessing
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* single bits of peripheral registers, and sometimes for RAM as well */
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/**
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* @name Bit manipulation functions
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* @{
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*/
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/* Generic bit band conversion routine */
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/**
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* @brief Convert bit band region address and bit number to bit band alias address
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*
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* @param[in] ptr base address in non bit banded memory
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* @param[in] bit bit number within the word
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*
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* @return Address of the bit within the bit band memory region
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*/
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static inline volatile void *bitband_addr(volatile void *ptr, uintptr_t bit)
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{
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return (volatile void *)((((uintptr_t)ptr) & 0xF0000000ul) + 0x2000000ul +
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((((uintptr_t)ptr) & 0xFFFFFul) << 5) + (bit << 2));
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}
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/**
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* @brief Set a single bit in the 32 bit word pointed to by @p ptr
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*
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* The effect is the same as for the following snippet:
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*
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* @code{c}
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* *ptr |= (1 << bit);
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* @endcode
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*
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* There is a read-modify-write cycle occurring within the core, but this cycle
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* is atomic and can not be disrupted by IRQs
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*
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* @param[in] ptr pointer to target word
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* @param[in] bit bit number within the word
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*/
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static inline void bit_set32(volatile uint32_t *ptr, uint8_t bit)
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{
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*((volatile uint32_t *)bitband_addr(ptr, bit)) = 1;
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}
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/**
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* @brief Set a single bit in the 16 bit word pointed to by @p ptr
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*
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* The effect is the same as for the following snippet:
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*
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* @code{c}
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* *ptr |= (1 << bit);
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* @endcode
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*
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* There is a read-modify-write cycle occurring within the core, but this cycle
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* is atomic and can not be disrupted by IRQs
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*
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* @param[in] ptr pointer to target word
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* @param[in] bit bit number within the word
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*/
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static inline void bit_set16(volatile uint16_t *ptr, uint8_t bit)
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{
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*((volatile uint16_t *)bitband_addr(ptr, bit)) = 1;
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}
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/**
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* @brief Set a single bit in the 8 bit byte pointed to by @p ptr
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*
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* The effect is the same as for the following snippet:
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*
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* @code{c}
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* *ptr |= (1 << bit);
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* @endcode
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*
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* There is a read-modify-write cycle occurring within the core, but this cycle
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* is atomic and can not be disrupted by IRQs
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*
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* @param[in] ptr pointer to target byte
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* @param[in] bit bit number within the byte
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*/
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static inline void bit_set8(volatile uint8_t *ptr, uint8_t bit)
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{
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*((volatile uint8_t *)bitband_addr(ptr, bit)) = 1;
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}
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/**
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* @brief Clear a single bit in the 32 bit word pointed to by @p ptr
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*
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* The effect is the same as for the following snippet:
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*
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* @code{c}
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* *ptr &= ~(1 << bit);
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* @endcode
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*
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* There is a read-modify-write cycle occurring within the core, but this cycle
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* is atomic and can not be disrupted by IRQs
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*
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* @param[in] ptr pointer to target word
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* @param[in] bit bit number within the word
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*/
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static inline void bit_clear32(volatile uint32_t *ptr, uint8_t bit)
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{
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*((volatile uint32_t *)bitband_addr(ptr, bit)) = 0;
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}
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/**
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* @brief Clear a single bit in the 16 bit word pointed to by @p ptr
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*
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* The effect is the same as for the following snippet:
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*
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* @code{c}
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* *ptr &= ~(1 << bit);
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* @endcode
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*
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* There is a read-modify-write cycle occurring within the core, but this cycle
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* is atomic and can not be disrupted by IRQs
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*
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* @param[in] ptr pointer to target word
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* @param[in] bit bit number within the word
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*/
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static inline void bit_clear16(volatile uint16_t *ptr, uint8_t bit)
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{
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*((volatile uint16_t *)bitband_addr(ptr, bit)) = 0;
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}
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/**
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* @brief Clear a single bit in the 8 bit byte pointed to by @p ptr
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*
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* The effect is the same as for the following snippet:
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*
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* @code{c}
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* *ptr &= ~(1 << bit);
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* @endcode
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*
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* There is a read-modify-write cycle occurring within the core, but this cycle
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* is atomic and can not be disrupted by IRQs
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*
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* @param[in] ptr pointer to target byte
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* @param[in] bit bit number within the byte
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*/
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static inline void bit_clear8(volatile uint8_t *ptr, uint8_t bit)
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{
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*((volatile uint8_t *)bitband_addr(ptr, bit)) = 0;
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}
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/** @} */
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#else /* CPU_HAS_BITBAND */
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/* CPU does not have bitbanding, fall back to plain C */
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static inline void bit_set32(volatile uint32_t *ptr, uint8_t bit)
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{
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*ptr |= (1 << (bit));
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}
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static inline void bit_set16(volatile uint16_t *ptr, uint8_t bit)
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{
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*ptr |= (1 << (bit));
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}
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static inline void bit_set8(volatile uint8_t *ptr, uint8_t bit)
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{
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*ptr |= (1 << (bit));
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}
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static inline void bit_clear32(volatile uint32_t *ptr, uint8_t bit)
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{
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*ptr &= ~(1 << (bit));
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}
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static inline void bit_clear16(volatile uint16_t *ptr, uint8_t bit)
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{
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*ptr &= ~(1 << (bit));
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}
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static inline void bit_clear8(volatile uint8_t *ptr, uint8_t bit)
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{
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*ptr &= ~(1 << (bit));
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}
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#endif /* CPU_HAS_BITBAND */
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#endif /* !BITBAND_FUNCTIONS_PROVIDED */
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#ifdef __cplusplus
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}
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#endif
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#endif /* BIT_H */
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/** @} */
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