From e0bb9d5689b003fe7a83218ed2ac294eefb2a6ea Mon Sep 17 00:00:00 2001 From: Hauke Petersen Date: Wed, 26 Nov 2014 16:31:36 +0100 Subject: [PATCH] board/stm32f3discovery: added PWM - added PWM feature - added PWM definitions to periph_conf.h --- boards/stm32f3discovery/Makefile.features | 3 +- boards/stm32f3discovery/include/periph_conf.h | 47 +++++++++++++++++-- 2 files changed, 46 insertions(+), 4 deletions(-) diff --git a/boards/stm32f3discovery/Makefile.features b/boards/stm32f3discovery/Makefile.features index 1a729a107b..38847eeda9 100644 --- a/boards/stm32f3discovery/Makefile.features +++ b/boards/stm32f3discovery/Makefile.features @@ -1 +1,2 @@ -FEATURES_PROVIDED += periph_gpio cpp +FEATURES_PROVIDED += cpp +FEATURES_PROVIDED += periph_uart periph_gpio periph_pwm diff --git a/boards/stm32f3discovery/include/periph_conf.h b/boards/stm32f3discovery/include/periph_conf.h index d877705ba1..916db6d14f 100644 --- a/boards/stm32f3discovery/include/periph_conf.h +++ b/boards/stm32f3discovery/include/periph_conf.h @@ -1,9 +1,9 @@ /* * Copyright (C) 2014 Freie Universität Berlin * - * This file is subject to the terms and conditions of the GNU Lesser General - * Public License v2.1. See the file LICENSE in the top level directory for more - * details. + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. */ /** @@ -106,6 +106,47 @@ extern "C" { #define UART_2_AF 7 /** @} */ +/** + * @brief PWM configuration + * @{ + */ +#define PWM_NUMOF (1U) +#define PWM_0_EN 1 +#define PWM_1_EN 1 + +#define PWM_MAX_CHANNELS 4 + +/* PWM 0 device configuration */ +#define PWM_0_DEV TIM3 +#define PWM_0_CHANNELS 4 +#define PWM_0_CLK (36000000U) +#define PWM_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM3EN) +#define PWM_0_CLKDIS() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM3EN)) +/* PWM 0 pin configuration */ +#define PWM_0_PORT GPIOC +#define PWM_0_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOCEN) +#define PWM_0_PIN_CH0 6 +#define PWM_0_PIN_CH1 7 +#define PWM_0_PIN_CH2 8 +#define PWM_0_PIN_CH3 9 +#define PWM_0_PIN_AF 2 + +/* PWM 1 device configuration */ +#define PWM_1_DEV TIM4 +#define PWM_1_CHANNELS 4 +#define PWM_1_CLK (36000000U) +#define PWM_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM4EN) +#define PWM_1_CLKDIS() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM4EN)) +/* PWM 1 pin configuration */ +#define PWM_1_PORT GPIOD +#define PWM_1_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIODEN) +#define PWM_1_PIN_CH0 12 +#define PWM_1_PIN_CH1 13 +#define PWM_1_PIN_CH2 14 +#define PWM_1_PIN_CH3 15 +#define PWM_1_PIN_AF 2 +/** @} */ + /** * @brief GPIO configuration * @{