From e3509fc0239a88cf74166468db82f68644ca17d5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fabian=20H=C3=BC=C3=9Fler?= Date: Sun, 23 Jan 2022 10:40:51 +0100 Subject: [PATCH] cpu/stm32: add sampling time to F4/F7 ADC driver --- cpu/stm32/periph/adc_f4_f7.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/cpu/stm32/periph/adc_f4_f7.c b/cpu/stm32/periph/adc_f4_f7.c index 64c489a6b1..a36a80282a 100644 --- a/cpu/stm32/periph/adc_f4_f7.c +++ b/cpu/stm32/periph/adc_f4_f7.c @@ -30,6 +30,12 @@ */ #define MAX_ADC_SPEED (12000000U) +/** + * @brief Maximum sampling time for each channel (480 cycles) + * T_CONV[µs] = (RESOLUTION[bits] + SMP[cycles]) / CLOCK_SPEED[MHz] + */ +#define MAX_ADC_SMP (7u) + /** * @brief Default VBAT undefined value */ @@ -93,7 +99,15 @@ int adc_init(adc_t line) } } ADC->CCR = ((clk_div / 2) - 1) << 16; - + /* set sampling time to the maximum */ + if (adc_config[line].chan >= 10) { + dev(line)->SMPR1 &= ~(MAX_ADC_SMP << (3 * (adc_config[line].chan - 10))); + dev(line)->SMPR1 |= MAX_ADC_SMP << (3 * (adc_config[line].chan - 10)); + } + else { + dev(line)->SMPR1 &= ~(MAX_ADC_SMP << (3 * adc_config[line].chan)); + dev(line)->SMPR2 |= MAX_ADC_SMP << (3 * adc_config[line].chan); + } /* free the device again */ done(line); return 0;