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cpu/stm32f0: fixed gpio interrupt routines

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- guarded calls in case no interrupt is defined
- eneabled detection of multiple, simoultaneous events
This commit is contained in:
Hauke Petersen 2015-03-13 15:26:52 +01:00
parent c13e589417
commit ec17730c38
1 changed files with 45 additions and 13 deletions
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58
cpu/stm32f0/periph/gpio.c
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@ -451,14 +451,18 @@ void gpio_write(gpio_t dev, int value)
void isr_exti0_1(void)
{
#if GPIO_IRQ_0 >= 0
if (EXTI->PR & EXTI_PR_PR0) {
EXTI->PR |= EXTI_PR_PR0; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_0].cb(gpio_config[GPIO_IRQ_0].arg);
}
else if (EXTI->PR & EXTI_PR_PR1) {
#endif
#if GPIO_IRQ_1 >= 0
if (EXTI->PR & EXTI_PR_PR1) {
EXTI->PR |= EXTI_PR_PR1; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_1].cb(gpio_config[GPIO_IRQ_1].arg);
}
#endif
if (sched_context_switch_request) {
thread_yield();
}
@ -466,14 +470,18 @@ void isr_exti0_1(void)
void isr_exti2_3(void)
{
#if GPIO_IRQ_2 >= 0
if (EXTI->PR & EXTI_PR_PR2) {
EXTI->PR |= EXTI_PR_PR2; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_2].cb(gpio_config[GPIO_IRQ_2].arg);
}
else if (EXTI->PR & EXTI_PR_PR3) {
#endif
#if GPIO_IRQ_3 >= 0
if (EXTI->PR & EXTI_PR_PR3) {
EXTI->PR |= EXTI_PR_PR3; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_3].cb(gpio_config[GPIO_IRQ_3].arg);
}
#endif
if (sched_context_switch_request) {
thread_yield();
}
@ -481,54 +489,78 @@ void isr_exti2_3(void)
void isr_exti4_15(void)
{
#if GPIO_IRQ_4 >= 0
if (EXTI->PR & EXTI_PR_PR4) {
EXTI->PR |= EXTI_PR_PR4; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_4].cb(gpio_config[GPIO_IRQ_4].arg);
}
else if (EXTI->PR & EXTI_PR_PR5) {
#endif
#if GPIO_IRQ_5 >= 0
if (EXTI->PR & EXTI_PR_PR5) {
EXTI->PR |= EXTI_PR_PR5; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_5].cb(gpio_config[GPIO_IRQ_5].arg);
}
else if (EXTI->PR & EXTI_PR_PR6) {
#endif
#if GPIO_IRQ_6 >= 0
if (EXTI->PR & EXTI_PR_PR6) {
EXTI->PR |= EXTI_PR_PR6; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_6].cb(gpio_config[GPIO_IRQ_6].arg);
}
else if (EXTI->PR & EXTI_PR_PR7) {
#endif
#if GPIO_IRQ_7 >= 0
if (EXTI->PR & EXTI_PR_PR7) {
EXTI->PR |= EXTI_PR_PR7; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_7].cb(gpio_config[GPIO_IRQ_7].arg);
}
else if (EXTI->PR & EXTI_PR_PR8) {
#endif
#if GPIO_IRQ_8 >= 0
if (EXTI->PR & EXTI_PR_PR8) {
EXTI->PR |= EXTI_PR_PR8; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_8].cb(gpio_config[GPIO_IRQ_8].arg);
}
else if (EXTI->PR & EXTI_PR_PR9) {
#endif
#if GPIO_IRQ_9 >= 0
if (EXTI->PR & EXTI_PR_PR9) {
EXTI->PR |= EXTI_PR_PR9; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_9].cb(gpio_config[GPIO_IRQ_9].arg);
}
else if (EXTI->PR & EXTI_PR_PR10) {
#endif
#if GPIO_IRQ_10 >= 0
if (EXTI->PR & EXTI_PR_PR10) {
EXTI->PR |= EXTI_PR_PR10; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_10].cb(gpio_config[GPIO_IRQ_10].arg);
}
else if (EXTI->PR & EXTI_PR_PR11) {
#endif
#if GPIO_IRQ_11 >= 0
if (EXTI->PR & EXTI_PR_PR11) {
EXTI->PR |= EXTI_PR_PR11; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_11].cb(gpio_config[GPIO_IRQ_11].arg);
}
else if (EXTI->PR & EXTI_PR_PR12) {
#endif
#if GPIO_IRQ_12 >= 0
if (EXTI->PR & EXTI_PR_PR12) {
EXTI->PR |= EXTI_PR_PR12; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_12].cb(gpio_config[GPIO_IRQ_12].arg);
}
else if (EXTI->PR & EXTI_PR_PR13) {
#endif
#if GPIO_IRQ_13 >= 0
if (EXTI->PR & EXTI_PR_PR13) {
EXTI->PR |= EXTI_PR_PR13; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_13].cb(gpio_config[GPIO_IRQ_13].arg);
}
else if (EXTI->PR & EXTI_PR_PR14) {
#endif
#if GPIO_IRQ_14 >= 0
if (EXTI->PR & EXTI_PR_PR14) {
EXTI->PR |= EXTI_PR_PR14; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_14].cb(gpio_config[GPIO_IRQ_14].arg);
}
else if (EXTI->PR & EXTI_PR_PR15) {
#endif
#if GPIO_IRQ_15 >= 0
if (EXTI->PR & EXTI_PR_PR15) {
EXTI->PR |= EXTI_PR_PR15; /* clear status bit by writing a 1 to it */
gpio_config[GPIO_IRQ_15].cb(gpio_config[GPIO_IRQ_15].arg);
}
#endif
if (sched_context_switch_request) {
thread_yield();
}