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cpu/stm32f4: add stm32f413zh support

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This commit is contained in:
Vincent Dupont 2017-02-07 15:28:24 +01:00
parent dfb7ccf3ca
commit efbad0dd3f
5 changed files with 15044 additions and 1 deletions
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2
cpu/stm32f4/include/cpu_conf.h
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@ -29,6 +29,8 @@
#include "stm32f407xx.h"
#elif defined(CPU_MODEL_STM32F411RE)
#include "stm32f411xe.h"
#elif defined(CPU_MODEL_STM32F413ZH)
#include "stm32f413xx.h"
#elif defined(CPU_MODEL_STM32F415RG)
#include "stm32f415xx.h"
#elif defined(CPU_MODEL_STM32F446RE)

2
cpu/stm32f4/include/periph_cpu.h
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@ -28,7 +28,7 @@ extern "C" {
/**
* @brief Available number of ADC devices
*/
#if defined(CPU_MODEL_STM32F401RE) || defined(CPU_MODEL_STM32F411RE)
#if defined(CPU_MODEL_STM32F401RE) || defined(CPU_MODEL_STM32F411RE)|| defined(CPU_MODEL_STM32F413ZH)
#define ADC_DEVS (1U)
#elif defined(CPU_MODEL_STM32F407VG) || defined(CPU_MODEL_STM32F415RG) || defined(CPU_MODEL_STM32F446RE)
#define ADC_DEVS (3U)

14991
cpu/stm32f4/include/stm32f413xx.h Normal file
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File diff suppressed because it is too large Load Diff

31
cpu/stm32f4/ldscripts/stm32f413zh.ld Normal file
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@ -0,0 +1,31 @@
/*
* Copyright (C) 2017 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f4
* @{
*
* @file
* @brief Memory definitions for the STM32F413ZH
*
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1536K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 64K
cpuid (r) : ORIGIN = 0x1fff7a10, LENGTH = 12
}
_cpuid_address = ORIGIN(cpuid);
INCLUDE cortexm_base.ld

19
cpu/stm32f4/vectors.c
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@ -1,5 +1,6 @@
/*
* Copyright (C) 2014-2015 Freie Universität Berlin
* 2017 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
@ -14,6 +15,7 @@
* @brief Interrupt vector definitions
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
@ -103,11 +105,20 @@ WEAK_DEFAULT void isr_dma2_stream7(void);
WEAK_DEFAULT void isr_usart6(void);
WEAK_DEFAULT void isr_i2c3_ev(void);
WEAK_DEFAULT void isr_i2c3_er(void);
#if defined(CPU_MODEL_STM32F413ZH)
/* STM32F413 specific interrupt vectors (CAN3)
* See RM0430, part 10.2 */
WEAK_DEFAULT void isr_can3_tx(void);
WEAK_DEFAULT void isr_can3_rx0(void);
WEAK_DEFAULT void isr_can3_rx1(void);
WEAK_DEFAULT void isr_can3_sce(void);
#else
WEAK_DEFAULT void isr_otg_hs_ep1_out(void);
WEAK_DEFAULT void isr_otg_hs_ep1_in(void);
WEAK_DEFAULT void isr_otg_hs_wkup(void);
WEAK_DEFAULT void isr_otg_hs(void);
WEAK_DEFAULT void isr_dcmi(void);
#endif
WEAK_DEFAULT void isr_cryp(void);
WEAK_DEFAULT void isr_hash_rng(void);
WEAK_DEFAULT void isr_fpu(void);
@ -209,11 +220,19 @@ ISR_VECTORS const void *interrupt_vector[] = {
(void*) isr_usart6, /* USART6 */
(void*) isr_i2c3_ev, /* I2C3 event */
(void*) isr_i2c3_er, /* I2C3 error */
#if defined(CPU_MODEL_STM32F413ZH)
(void*) isr_can3_tx, /* CAN3 TX */
(void*) isr_can3_rx0, /* CAN3 RX0 */
(void*) isr_can3_rx1, /* CAN3 RX1 */
(void*) isr_can3_sce, /* CAN3 SCE */
(void*) (0UL), /* Reserved */
#else
(void*) isr_otg_hs_ep1_out, /* USB OTG HS End Point 1 Out */
(void*) isr_otg_hs_ep1_in, /* USB OTG HS End Point 1 In */
(void*) isr_otg_hs_wkup, /* USB OTG HS Wakeup through EXTI */
(void*) isr_otg_hs, /* USB OTG HS */
(void*) isr_dcmi, /* DCMI */
#endif
(void*) isr_cryp, /* CRYP crypto */
(void*) isr_hash_rng, /* Hash and Rng */
(void*) isr_fpu, /* FPU */