From efd73d735b2a3859f853694e226e6f38052dd7f5 Mon Sep 17 00:00:00 2001 From: Oliver Hahm Date: Mon, 1 Apr 2013 00:18:52 +0200 Subject: [PATCH] * initial not yet compiling(!) support for mc1322x --- cpu/mc1322x/Makefile | 12 ++ cpu/mc1322x/include/cpu-conf.h | 61 ++++++++ cpu/mc1322x/include/cpu.h | 16 ++ cpu/mc1322x/mc1322x.lds | 269 +++++++++++++++++++++++++++++++++ cpu/mc1322x/start.s | 190 +++++++++++++++++++++++ 5 files changed, 548 insertions(+) create mode 100644 cpu/mc1322x/Makefile create mode 100644 cpu/mc1322x/include/cpu-conf.h create mode 100644 cpu/mc1322x/include/cpu.h create mode 100644 cpu/mc1322x/mc1322x.lds create mode 100644 cpu/mc1322x/start.s diff --git a/cpu/mc1322x/Makefile b/cpu/mc1322x/Makefile new file mode 100644 index 0000000000..431b3b75bb --- /dev/null +++ b/cpu/mc1322x/Makefile @@ -0,0 +1,12 @@ +MODULE =cpu + +DIRS = + +all: $(BINDIR)$(MODULE).a + @for i in $(DIRS) ; do $(MAKE) -C $$i ; done ; + +include $(RIOTBASE)/Makefile.base + +clean:: + @for i in $(DIRS) ; do $(MAKE) -C $$i clean ; done ; + diff --git a/cpu/mc1322x/include/cpu-conf.h b/cpu/mc1322x/include/cpu-conf.h new file mode 100644 index 0000000000..3c0540d304 --- /dev/null +++ b/cpu/mc1322x/include/cpu-conf.h @@ -0,0 +1,61 @@ +/* + * cpu.h - mc1322x specific definitions + * Copyright (C) 2013 Oliver Hahm + * + * This source code is licensed under the GNU General Public License, + * Version 3. See the file LICENSE for more details. + * + * This file is part of RIOT + */ + +#ifndef CPUCONF_H_ +#define CPUCONF_H_ + +/** + * @ingroup conf + * @ingroup mc1322x + * + * @{ + */ + +/** + * @file + * @brief MC1322X CPUconfiguration + * + * @author Oleg Hahm + */ + +/** + * @name Stdlib configuration + * @{ + */ +#define __FOPEN_MAX__ 4 +#define __FILENAME_MAX__ 12 +/** @} */ + +/** + * @name Kernel configuration + * @{ + */ +#ifndef KERNEL_CONF_STACKSIZE_DEFAULT +#define KERNEL_CONF_STACKSIZE_DEFAULT 4500 +#endif + +#define KERNEL_CONF_STACKSIZE_IDLE 500 +/** @} */ + +/** + * @name Compiler specifics + * @{ + */ +#define CC_CONF_INLINE inline +#define CC_CONF_USED __attribute__((used)) +#define CC_CONF_NONNULL(...) __attribute__((nonnull(__VA_ARGS__))) +#define CC_CONF_WARN_UNUSED_RESULT __attribute__((warn_unused_result)) +/** @} */ + +#define TRANSCEIVER_BUFFER_SIZE (10) +#define RX_BUF_SIZE (10) + +/** @} */ +#endif /* CPUCONF_H_ */ diff --git a/cpu/mc1322x/include/cpu.h b/cpu/mc1322x/include/cpu.h new file mode 100644 index 0000000000..511790695b --- /dev/null +++ b/cpu/mc1322x/include/cpu.h @@ -0,0 +1,16 @@ +/* + * cpu.h - mc1322x specific definitions + * Copyright (C) 2013 Oliver Hahm + * + * This source code is licensed under the GNU General Public License, + * Version 3. See the file LICENSE for more details. + */ + +#ifndef CPU_H +#define CPU_H + +#include + +extern uintptr_t __stack_start; ///< end of user stack memory space + +#endif /* CPU_H */ diff --git a/cpu/mc1322x/mc1322x.lds b/cpu/mc1322x/mc1322x.lds new file mode 100644 index 0000000000..95fcb26658 --- /dev/null +++ b/cpu/mc1322x/mc1322x.lds @@ -0,0 +1,269 @@ +/* Script for -z combreloc: combine and sort reloc sections */ +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", + "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) + +MEMORY + { + ram (rwx) : org = 0x00400000, l = 96K + } + +SECTIONS +{ + +SYS_STACK_SIZE = 1024; +IRQ_STACK_SIZE = 256; +FIQ_STACK_SIZE = 256; +SVC_STACK_SIZE = 256; +ABT_STACK_SIZE = 16; +UND_STACK_SIZE = 16; +HEAP_SIZE = 4096; + + /* Read-only sections, merged into text segment: */ + PROVIDE (__executable_start = 0x00400000); . = 0x00400000; + .text : + { + *(.start) + *(.irq) + *(.text .stub .text.* .gnu.linkonce.t.*) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx) + } =0 + + .interp : { *(.interp) } + .note.gnu.build-id : { *(.note.gnu.build-id) } + .hash : { *(.hash) } + .gnu.hash : { *(.gnu.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.dyn : + { + *(.rel.init) + *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) + *(.rel.fini) + *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) + *(.rel.data.rel.ro* .rel.gnu.linkonce.d.rel.ro.*) + *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) + *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) + *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) + *(.rel.ctors) + *(.rel.dtors) + *(.rel.got) + *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) + } + .rela.dyn : + { + *(.rela.init) + *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) + *(.rela.fini) + *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) + *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) + *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) + *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) + *(.rela.ctors) + *(.rela.dtors) + *(.rela.got) + *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) + } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : + { + KEEP (*(.init)) + } =0 + .plt : { *(.plt) } + .fini : + { + KEEP (*(.fini)) + } =0 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } + .rodata1 : { *(.rodata1) } + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + .gcc_except_table : ONLY_IF_RO { *(.gcc_except_table .gcc_except_table.*) } + /* Adjust the address for the data segment. We want to adjust up to + the same address within the page on the next page up. */ + +/* . = ALIGN (CONSTANT (MAXPAGESIZE)) - ((CONSTANT (MAXPAGESIZE) - .) & (CONSTANT (MAXPAGESIZE) - 1)); . = DATA_SEGMENT_ALIGN (CONSTANT (MAXPAGESIZE), CONSTANT (COMMONPAGESIZE)); */ + + . = ALIGN(4); + . = DATA_SEGMENT_ALIGN(4,4); + + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + .gcc_except_table : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) } + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + } + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } + .dtors : + { + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } + .jcr : { KEEP (*(.jcr)) } + .data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro* .gnu.linkonce.d.rel.ro.*) } + .dynamic : { *(.dynamic) } + . = DATA_SEGMENT_RELRO_END (0, .); + .got : { *(.got.plt) *(.got) } + .data : + { + __data_start = . ; + *(.data .data.* .gnu.linkonce.d.*) + SORT(CONSTRUCTORS) + } + .data1 : { *(.data1) } + _edata = .; PROVIDE (edata = .); + + .stack : { + __stack_start__ = . ; + + . += IRQ_STACK_SIZE; + . = ALIGN (4); + __irq_stack_top__ = . ; + + . += FIQ_STACK_SIZE; + . = ALIGN (4); + __fiq_stack_top__ = . ; + + . += SVC_STACK_SIZE; + . = ALIGN (4); + __svc_stack_top__ = . ; + + . += ABT_STACK_SIZE; + . = ALIGN (4); + __abt_stack_top__ = . ; + + . += UND_STACK_SIZE; + . = ALIGN (4); + __und_stack_top__ = . ; + + . += SYS_STACK_SIZE; + . = ALIGN (4); + __sys_stack_top__ = . ; + + __stack_end__ = .; + } + + + __bss_start = .; + __bss_start__ = .; + .bss : + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. + FIXME: Why do we need it? When there is no .bss section, we don't + pad the .data section. */ + . = ALIGN(. != 0 ? 32 / 8 : 1); + } + _bss_end__ = . ; __bss_end__ = . ; + . = ALIGN(32 / 8); + + .heap : { + __heap_start__ = . ; PROVIDE(__HEAP_START = .); + *(.heap); + . += HEAP_SIZE; + . = ALIGN (4); + __heap_end__ = . ; PROVIDE(__HEAP_END = .); + } + + + . = ALIGN(32 / 8); + __end__ = . ; + _end = .; PROVIDE (end = .); + . = DATA_SEGMENT_END (.); + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + /* DWARF 3 */ + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) } + .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } + /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) } +} diff --git a/cpu/mc1322x/start.s b/cpu/mc1322x/start.s new file mode 100644 index 0000000000..0d0e6ab952 --- /dev/null +++ b/cpu/mc1322x/start.s @@ -0,0 +1,190 @@ +/* + * Copyright (c) 2010, Mariano Alvira and other contributors + * to the MC1322x project (http://mc1322x.devl.org) and Contiki. + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is part of the Contiki OS. + * + * + */ + + +/* +The following lincence is for all parts of this code done by +Martin Thomas. Code from others used here may have other license terms. + +Copyright (C) 2004 Martin THOMAS + +Permission is hereby granted, free of charge, to any person obtaining a copy of +this software and associated documentation files (the "Software"), to deal in +the Software without restriction, including without limitation the rights to +use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of +the Software, and to permit persons to whom the Software is furnished to do so, +subject to the following conditions: + +! The above copyright notice and this permission notice shall be included in all +! copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS +FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR +COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER +IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ + +// Stack Sizes + .set UND_STACK_SIZE, 0x00000004 + .set ABT_STACK_SIZE, 0x00000004 + .set FIQ_STACK_SIZE, 0x00000004 + .set IRQ_STACK_SIZE, 0X00000080 + .set SVC_STACK_SIZE, 0x00000004 + +// Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs + .set MODE_USR, 0x10 // User Mode + .set MODE_FIQ, 0x11 // FIQ Mode + .set MODE_IRQ, 0x12 // IRQ Mode + .set MODE_SVC, 0x13 // Supervisor Mode + .set MODE_ABT, 0x17 // Abort Mode + .set MODE_UND, 0x1B // Undefined Mode + .set MODE_SYS, 0x1F // System Mode + + .equ I_BIT, 0x80 // when I bit is set, IRQ is disabled + .equ F_BIT, 0x40 // when F bit is set, FIQ is disabled + + .section .start + + .set _rom_data_init, 0x108d0 + .global _start +_start: + b _begin // reset - _start + ldr pc,_undf // undefined + ldr pc,_swi // SWI + ldr pc,_pabt // program abort + ldr pc,_dabt // data abort + nop // reserved + ldr pc,_irq // IRQ + ldr pc,_fiq // FIQ + + /* these vectors are used for rom patching */ +.org 0x20 +.code 16 +_RPTV_0_START: + bx lr /* do nothing */ + +.org 0x60 +_RPTV_1_START: + bx lr /* do nothing */ + +.org 0xa0 +_RPTV_2_START: + bx lr /* do nothing */ + +.org 0xe0 +_RPTV_3_START: + bx lr /* do nothing */ + +.org 0x120 +ROM_var_start: .word 0 +.org 0x7ff +ROM_var_end: .word 0 + +.code 32 +.align +_begin: + /* FIQ mode stack */ + msr CPSR_c, #(MODE_FIQ | I_BIT | F_BIT) + ldr sp, =__fiq_stack_top__ /* set the FIQ stack pointer */ + + /* IRQ mode stack */ + msr CPSR_c, #(MODE_IRQ | I_BIT | F_BIT) + ldr sp, =__irq_stack_top__ /* set the IRQ stack pointer */ + + /* Supervisor mode stack */ + msr CPSR_c, #(MODE_SVC | I_BIT | F_BIT) + ldr sp, =__svc_stack_top__ /* set the SVC stack pointer */ + + /* Undefined mode stack */ + msr CPSR_c, #(MODE_UND | I_BIT | F_BIT) + ldr sp, =__und_stack_top__ /* set the UND stack pointer */ + + /* Abort mode stack */ + msr CPSR_c, #(MODE_ABT | I_BIT | F_BIT) + ldr sp, =__abt_stack_top__ /* set the ABT stack pointer */ + + /* System mode stack */ + msr CPSR_c, #(MODE_SYS | I_BIT | F_BIT) + ldr sp, =__sys_stack_top__ /* set the SYS stack pointer */ + + /* call the rom_data_init function in ROM */ + /* initializes ROM_var space defined by ROM_var_start and ROM_var_end */ + /* this area is used by ROM functions (e.g. nvm_read) */ + ldr r12,=_rom_data_init + mov lr,pc + bx r12 + + msr CPSR_c, #(MODE_SYS) + + /* Clear BSS */ +clear_bss: + ldr r0, _bss_start /* find start of bss segment */ + ldr r1, _bss_end /* stop here */ + mov r2, #0x00000000 /* clear */ +clbss_l: + str r2, [r0] /* clear loop... */ + add r0, r0, #4 + cmp r0, r1 + blt clbss_l + + b main + +_undf: .word __undf // undefined +_swi: .word __swi // SWI +_pabt: .word __pabt // program abort +_dabt: .word __dabt // data abort +_irq: .word irq // IRQ +_fiq: .word __fiq // FIQ + +__undf: b . // undefined +__swi: b . // SWI +__pabt: b . // program abort +__dabt: b . // data abort +/* IRQ handler set in isr.c */ +//__irq: b . // IRQ +__fiq: b . // FIQ + +/* + * These are defined in the board-specific linker script. + */ +.globl _bss_start +_bss_start: + .word __bss_start + + .globl _bss_end +_bss_end: + .word _end