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boards/nucleo-g474re: add support for nucleo-g474re
This commit is contained in:
Alexandre Abadie
parent
34c872093c
commit
fa9fc5e206
4
boards/nucleo-g474re/Makefile
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4
boards/nucleo-g474re/Makefile
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MODULE = board
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DIRS = $(RIOTBOARD)/common/nucleo
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include $(RIOTBASE)/Makefile.base
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3
boards/nucleo-g474re/Makefile.dep
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3
boards/nucleo-g474re/Makefile.dep
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FEATURES_REQUIRED += periph_lpuart
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include $(RIOTBOARD)/common/nucleo/Makefile.dep
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16
boards/nucleo-g474re/Makefile.features
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boards/nucleo-g474re/Makefile.features
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CPU = stm32
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CPU_MODEL = stm32g474re
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_rtc
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FEATURES_PROVIDED += periph_rtt
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart periph_lpuart
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# Put other features for this board (in alphabetical order)
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FEATURES_PROVIDED += riotboot
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# load the common Makefile.features for Nucleo boards
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include $(RIOTBOARD)/common/nucleo64/Makefile.features
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2
boards/nucleo-g474re/Makefile.include
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2
boards/nucleo-g474re/Makefile.include
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# load the common Makefile.include for Nucleo boards
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include $(RIOTBOARD)/common/nucleo64/Makefile.include
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26
boards/nucleo-g474re/doc.txt
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26
boards/nucleo-g474re/doc.txt
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/**
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@defgroup boards_nucleo-g474re STM32 Nucleo-G474RE
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@ingroup boards_common_nucleo64
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@brief Support for the STM32 Nucleo-G474RE
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## Flashing the device
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The ST Nucleo-G474RE board includes an on-board ST-LINK V3 programmer. The
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easiest way to program the board is to use OpenOCD. Once you have installed
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OpenOCD (look [here](https://github.com/RIOT-OS/RIOT/wiki/OpenOCD) for
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installation instructions), you can flash the board simply by typing
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```
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make BOARD=nucleo-g474re flash
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```
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and debug via GDB by simply typing
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```
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make BOARD=nucleo-g474re debug
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```
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## Supported Toolchains
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For using the ST Nucleo-G474RE board we recommend the usage of the
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[GNU Tools for ARM Embedded Processors](https://launchpad.net/gcc-arm-embedded)
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toolchain.
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*/
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117
boards/nucleo-g474re/include/periph_conf.h
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117
boards/nucleo-g474re/include/periph_conf.h
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/*
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* Copyright (C) 2020 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_nucleo-g474re
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the nucleo-g474re board
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#include "g4/cfg_clock_default.h"
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#include "cfg_i2c1_pb8_pb9.h"
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#include "cfg_rtt_default.h"
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#include "cfg_timer_tim5.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.dev = LPUART1,
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.rcc_mask = RCC_APB1ENR2_LPUART1EN,
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.rx_pin = GPIO_PIN(PORT_A, 3),
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.tx_pin = GPIO_PIN(PORT_A, 2),
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.rx_af = GPIO_AF12,
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.tx_af = GPIO_AF12,
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.bus = APB12,
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.irqn = LPUART1_IRQn,
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.type = STM32_LPUART,
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.clk_src = 0, /* Use APB clock */
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},
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{ /* Connected to Arduino D0/D1 */
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.dev = USART1,
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.rcc_mask = RCC_APB2ENR_USART1EN,
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.rx_pin = GPIO_PIN(PORT_C, 5),
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.tx_pin = GPIO_PIN(PORT_C, 4),
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.rx_af = GPIO_AF7,
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.tx_af = GPIO_AF7,
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.bus = APB2,
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.irqn = USART1_IRQn,
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.type = STM32_USART,
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.clk_src = 0, /* Use APB clock */
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},
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};
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#define UART_0_ISR (isr_lpuart1)
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#define UART_1_ISR (isr_usart1)
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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/**
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* @name SPI configuration
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*
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* @note The spi_divtable is auto-generated from
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* `cpu/stm32_common/dist/spi_divtable/spi_divtable.c`
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* @{
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*/
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static const uint8_t spi_divtable[2][5] = {
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{ /* for APB1 @ 80000000Hz */
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7, /* -> 312500Hz */
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7, /* -> 312500Hz */
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5, /* -> 1250000Hz */
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3, /* -> 5000000Hz */
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2 /* -> 10000000Hz */
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},
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{ /* for APB2 @ 80000000Hz */
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7, /* -> 312500Hz */
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7, /* -> 312500Hz */
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5, /* -> 1250000Hz */
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3, /* -> 5000000Hz */
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2 /* -> 10000000Hz */
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}
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};
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static const spi_conf_t spi_config[] = {
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{
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.dev = SPI1,
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.mosi_pin = GPIO_PIN(PORT_A, 7), /* Arduino D11 */
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.miso_pin = GPIO_PIN(PORT_A, 6), /* Arduino D12 */
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.sclk_pin = GPIO_PIN(PORT_A, 5), /* Arduino D13 */
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.cs_pin = GPIO_UNDEF,
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.mosi_af = GPIO_AF5,
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.miso_af = GPIO_AF5,
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.sclk_af = GPIO_AF5,
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.cs_af = GPIO_AF5,
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.rccmask = RCC_APB2ENR_SPI1EN,
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.apbbus = APB2,
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},
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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