diff --git a/boards/b-l475e-iot01a/include/periph_conf.h b/boards/b-l475e-iot01a/include/periph_conf.h index 65c79b52d1..d9046914ee 100644 --- a/boards/b-l475e-iot01a/include/periph_conf.h +++ b/boards/b-l475e-iot01a/include/periph_conf.h @@ -179,6 +179,7 @@ static const i2c_conf_t i2c_config[] = { .sda_af = GPIO_AF4, .bus = APB1, .rcc_mask = RCC_APB1ENR1_I2C1EN, + .rcc_sw_mask = RCC_CCIPR_I2C1SEL_1, /* HSI (16 MHz) */ .irqn = I2C1_ER_IRQn, }, { @@ -190,6 +191,7 @@ static const i2c_conf_t i2c_config[] = { .sda_af = GPIO_AF4, .bus = APB1, .rcc_mask = RCC_APB1ENR1_I2C2EN, + .rcc_sw_mask = RCC_CCIPR_I2C2SEL_1, /* HSI (16 MHz) */ .irqn = I2C2_ER_IRQn, }, }; diff --git a/boards/b-u585i-iot02a/include/periph_conf.h b/boards/b-u585i-iot02a/include/periph_conf.h index c7de49c36c..19a2795e81 100644 --- a/boards/b-u585i-iot02a/include/periph_conf.h +++ b/boards/b-u585i-iot02a/include/periph_conf.h @@ -158,6 +158,7 @@ static const i2c_conf_t i2c_config[] = { .sda_af = GPIO_AF4, .bus = APB1, .rcc_mask = RCC_APB1ENR1_I2C1EN, + .rcc_sw_mask = RCC_CCIPR1_I2C1SEL_1, .irqn = I2C1_ER_IRQn, }, { @@ -169,6 +170,7 @@ static const i2c_conf_t i2c_config[] = { .sda_af = GPIO_AF4, .bus = APB1, .rcc_mask = RCC_APB1ENR1_I2C2EN, + .rcc_sw_mask = RCC_CCIPR1_I2C2SEL_1, .irqn = I2C2_ER_IRQn, }, }; diff --git a/boards/common/stm32/include/cfg_i2c1_pb6_pb7.h b/boards/common/stm32/include/cfg_i2c1_pb6_pb7.h index 6e8f9c3ce5..cf239ba619 100644 --- a/boards/common/stm32/include/cfg_i2c1_pb6_pb7.h +++ b/boards/common/stm32/include/cfg_i2c1_pb6_pb7.h @@ -45,6 +45,7 @@ static const i2c_conf_t i2c_config[] = { .bus = APB1, #if CPU_FAM_STM32L4 .rcc_mask = RCC_APB1ENR1_I2C1EN, + .rcc_sw_mask = RCC_CCIPR_I2C1SEL_1, /* HSI (16 MHz) */ .irqn = I2C1_ER_IRQn, #else /* CPU_FAM_STM32L0 */ .rcc_mask = RCC_APB1ENR_I2C1EN, diff --git a/boards/common/stm32/include/cfg_i2c1_pb8_pb9.h b/boards/common/stm32/include/cfg_i2c1_pb8_pb9.h index 985411f1c3..65499e8823 100644 --- a/boards/common/stm32/include/cfg_i2c1_pb8_pb9.h +++ b/boards/common/stm32/include/cfg_i2c1_pb8_pb9.h @@ -50,14 +50,21 @@ static const i2c_conf_t i2c_config[] = { .rcc_mask = RCC_APB1ENR_I2C1EN, .clk = CLOCK_APB1, .irqn = I2C1_EV_IRQn, -#elif CPU_FAM_STM32L4 || CPU_FAM_STM32WB || CPU_FAM_STM32G4 || CPU_FAM_STM32L5 +#elif CPU_FAM_STM32L4 || CPU_FAM_STM32WB || CPU_FAM_STM32G4 .rcc_mask = RCC_APB1ENR1_I2C1EN, + .rcc_sw_mask = RCC_CCIPR_I2C1SEL_1, /* HSI (16 MHz) */ + .irqn = I2C1_ER_IRQn, +#elif CPU_FAM_STM32L5 + .rcc_mask = RCC_APB1ENR1_I2C1EN, + .rcc_sw_mask = RCC_CCIPR1_I2C1SEL_1, /* HSI (16 MHz) */ .irqn = I2C1_ER_IRQn, #elif CPU_FAM_STM32G0 .rcc_mask = RCC_APBENR1_I2C1EN, + .rcc_sw_mask = RCC_CCIPR_I2C1SEL_1, /* HSI (16 MHz) */ .irqn = I2C1_IRQn, #elif CPU_FAM_STM32F7 .rcc_mask = RCC_APB1ENR_I2C1EN, + .rcc_sw_mask = RCC_DCKCFGR2_I2C1SEL_1, /* HSI (16 MHz) */ .irqn = I2C1_ER_IRQn, #elif CPU_FAM_STM32F0 || CPU_FAM_STM32L0 .rcc_mask = RCC_APB1ENR_I2C1EN, diff --git a/boards/lora-e5-dev/include/periph_conf.h b/boards/lora-e5-dev/include/periph_conf.h index 4df678de62..e123e92d9c 100644 --- a/boards/lora-e5-dev/include/periph_conf.h +++ b/boards/lora-e5-dev/include/periph_conf.h @@ -143,6 +143,7 @@ static const i2c_conf_t i2c_config[] = { .sda_af = GPIO_AF4, .bus = APB1, .rcc_mask = RCC_APB1ENR1_I2C2EN, + .rcc_sw_mask = RCC_CCIPR_I2C2SEL_1, /* HSI (16 MHz) */ .irqn = I2C2_ER_IRQn, } }; diff --git a/boards/nucleo-l433rc/include/periph_conf.h b/boards/nucleo-l433rc/include/periph_conf.h index 9afa75259d..c704ba14af 100644 --- a/boards/nucleo-l433rc/include/periph_conf.h +++ b/boards/nucleo-l433rc/include/periph_conf.h @@ -131,6 +131,7 @@ static const i2c_conf_t i2c_config[] = { .sda_af = GPIO_AF4, .bus = APB1, .rcc_mask = RCC_APB1ENR1_I2C1EN, + .rcc_sw_mask = RCC_CCIPR_I2C2SEL_1, /* HSI (16 MHz) */ .irqn = I2C1_ER_IRQn }, }; diff --git a/boards/nucleo-wl55jc/include/periph_conf.h b/boards/nucleo-wl55jc/include/periph_conf.h index 89156bd782..d8f7dbbca0 100644 --- a/boards/nucleo-wl55jc/include/periph_conf.h +++ b/boards/nucleo-wl55jc/include/periph_conf.h @@ -132,6 +132,7 @@ static const i2c_conf_t i2c_config[] = { .sda_af = GPIO_AF4, .bus = APB1, .rcc_mask = RCC_APB1ENR1_I2C2EN, + .rcc_sw_mask = RCC_CCIPR_I2C2SEL_1, /* HSI (16 MHz) */ .irqn = I2C2_ER_IRQn, } }; diff --git a/boards/p-l496g-cell02/include/periph_conf.h b/boards/p-l496g-cell02/include/periph_conf.h index d02b48b945..d4e78d90b8 100644 --- a/boards/p-l496g-cell02/include/periph_conf.h +++ b/boards/p-l496g-cell02/include/periph_conf.h @@ -116,6 +116,7 @@ static const i2c_conf_t i2c_config[] = { .sda_af = GPIO_AF4, .bus = APB1, .rcc_mask = RCC_APB1ENR1_I2C1EN, + .rcc_sw_mask = RCC_CCIPR_I2C1SEL_1, /* HSI (16 MHz) */ .irqn = I2C1_ER_IRQn }, }; diff --git a/boards/stm32f723e-disco/include/periph_conf.h b/boards/stm32f723e-disco/include/periph_conf.h index ea1c4d58e4..28e4e7b5ed 100644 --- a/boards/stm32f723e-disco/include/periph_conf.h +++ b/boards/stm32f723e-disco/include/periph_conf.h @@ -154,6 +154,7 @@ static const i2c_conf_t i2c_config[] = { .sda_af = GPIO_AF4, .bus = APB1, .rcc_mask = RCC_APB1ENR_I2C2EN, + .rcc_sw_mask = RCC_DCKCFGR2_I2C2SEL_1, .irqn = I2C2_ER_IRQn, }, { /* Connected to touchscreen controller */ @@ -165,6 +166,7 @@ static const i2c_conf_t i2c_config[] = { .sda_af = GPIO_AF4, .bus = APB1, .rcc_mask = RCC_APB1ENR_I2C3EN, + .rcc_sw_mask = RCC_DCKCFGR2_I2C3SEL_1, .irqn = I2C3_ER_IRQn, }, { @@ -176,6 +178,7 @@ static const i2c_conf_t i2c_config[] = { .sda_af = GPIO_AF4, .bus = APB1, .rcc_mask = RCC_APB1ENR_I2C1EN, + .rcc_sw_mask = RCC_DCKCFGR2_I2C1SEL_1, .irqn = I2C1_ER_IRQn, }, }; diff --git a/boards/stm32f746g-disco/include/periph_conf.h b/boards/stm32f746g-disco/include/periph_conf.h index 35dd80691b..07c671ce7c 100644 --- a/boards/stm32f746g-disco/include/periph_conf.h +++ b/boards/stm32f746g-disco/include/periph_conf.h @@ -160,6 +160,7 @@ static const i2c_conf_t i2c_config[] = { .sda_af = GPIO_AF4, .bus = APB1, .rcc_mask = RCC_APB1ENR_I2C1EN, + .rcc_sw_mask = RCC_DCKCFGR2_I2C1SEL_1, .irqn = I2C1_ER_IRQn, }, { @@ -171,6 +172,7 @@ static const i2c_conf_t i2c_config[] = { .sda_af = GPIO_AF4, .bus = APB1, .rcc_mask = RCC_APB1ENR_I2C3EN, + .rcc_sw_mask = RCC_DCKCFGR2_I2C3SEL_1, .irqn = I2C3_ER_IRQn, }, };