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cpu/sam0_common/periph/rtt: uncrustify
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15bbd95b6a
commit
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@ -47,17 +47,17 @@
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#endif
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static rtt_cb_t _overflow_cb;
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static void* _overflow_arg;
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static void *_overflow_arg;
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static rtt_cb_t _cmp0_cb;
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static void* _cmp0_arg;
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static void *_cmp0_arg;
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static void _wait_syncbusy(void)
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{
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#ifdef REG_RTC_MODE0_SYNCBUSY
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while (RTC->MODE0.SYNCBUSY.reg) {}
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#else
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while(RTC->MODE0.STATUS.bit.SYNCBUSY) {}
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while (RTC->MODE0.STATUS.bit.SYNCBUSY) {}
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#endif
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}
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@ -76,7 +76,8 @@ static inline void _rtt_reset(void)
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static void _rtt_clock_setup(void)
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{
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/* Setup clock GCLK2 with OSC32K */
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GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN(SAM0_GCLK_32KHZ) | GCLK_CLKCTRL_ID_RTC;
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GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN(SAM0_GCLK_32KHZ) |
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GCLK_CLKCTRL_ID_RTC;
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while (GCLK->STATUS.bit.SYNCBUSY) {}
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}
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#else
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@ -98,6 +99,7 @@ static void _rtt_clock_setup(void)
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#else
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#error "No clock source for RTT selected. "
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#endif
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}
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#endif /* !CPU_SAMD21 - Clock Setup */
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@ -120,7 +122,7 @@ void rtt_init(void)
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/* initially clear flag */
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RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_CMP0
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| RTC_MODE0_INTFLAG_OVF;
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| RTC_MODE0_INTFLAG_OVF;
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NVIC_EnableIRQ(RTC_IRQn);
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@ -179,7 +181,7 @@ void rtt_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg)
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_wait_syncbusy();
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/* enable compare interrupt and clear flag */
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RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_CMP0;
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RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_CMP0;
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RTC->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_CMP0;
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}
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