From ff8baaae797e89186162dfd4e879e5e88b0d4cd5 Mon Sep 17 00:00:00 2001 From: Gunar Schorcht Date: Mon, 18 Jul 2022 07:33:33 +0200 Subject: [PATCH] cpu/esp32: use CPU_FAM_* instead of MCU_* To support ESP32x families with the existing implementation, CPU_FAM_* is used instead of MCU_* in source code. --- cpu/esp32/include/adc_arch.h | 2 +- cpu/esp32/irq_arch.c | 18 +++++++++--------- cpu/esp32/periph/adc.c | 2 +- cpu/esp32/periph/gpio.c | 2 +- cpu/esp32/periph/i2c_hw.c | 2 +- cpu/esp32/periph/rtt_hw_rtc.c | 4 ++-- cpu/esp32/periph/spi.c | 8 ++++---- cpu/esp32/periph/timer.c | 4 ++-- cpu/esp32/startup.c | 2 +- cpu/esp32/syscalls.c | 6 +++--- 10 files changed, 25 insertions(+), 25 deletions(-) diff --git a/cpu/esp32/include/adc_arch.h b/cpu/esp32/include/adc_arch.h index 7601ea1126..379e448d52 100644 --- a/cpu/esp32/include/adc_arch.h +++ b/cpu/esp32/include/adc_arch.h @@ -103,7 +103,7 @@ int adc_set_attenuation(adc_t line, adc_atten_t atten); */ int adc_line_vref_to_gpio(adc_t line, gpio_t gpio); -#if defined(MCU_ESP32) +#if defined(CPU_FAM_ESP32) /** * @brief Output ADC reference voltage to GPIO25 * diff --git a/cpu/esp32/irq_arch.c b/cpu/esp32/irq_arch.c index be181066bc..7ad939639f 100644 --- a/cpu/esp32/irq_arch.c +++ b/cpu/esp32/irq_arch.c @@ -47,36 +47,36 @@ static const struct intr_handle_data_t _irq_data_table[] = { { ETS_FROM_CPU_INTR0_SOURCE, CPU_INUM_SOFTWARE, 1 }, { ETS_TG0_WDT_LEVEL_INTR_SOURCE, CPU_INUM_WDT, 1 }, { ETS_TG0_T0_LEVEL_INTR_SOURCE, CPU_INUM_RTT, 1 }, -#if defined(MCU_ESP32) || defined(MCU_ESP32S2) || defined(MCU_ESP32S3) +#if defined(CPU_FAM_ESP32) || defined(CPU_FAM_ESP32S2) || defined(CPU_FAM_ESP32S3) { ETS_TG0_T1_LEVEL_INTR_SOURCE, CPU_INUM_TIMER, 2 }, #endif -#if defined(MCU_ESP32) || defined(MCU_ESP32S2) +#if defined(CPU_FAM_ESP32) || defined(CPU_FAM_ESP32S2) { ETS_TG0_LACT_LEVEL_INTR_SOURCE, CPU_INUM_TIMER, 2 }, #endif -#if !defined(MCU_ESP32C2) +#if !defined(CPU_FAM_ESP32C2) { ETS_TG1_T0_LEVEL_INTR_SOURCE, CPU_INUM_TIMER, 2 }, #endif -#if defined(MCU_ESP32) || defined(MCU_ESP32S2) || defined(MCU_ESP32S3) +#if defined(CPU_FAM_ESP32) || defined(CPU_FAM_ESP32S2) || defined(CPU_FAM_ESP32S3) { ETS_TG1_T1_LEVEL_INTR_SOURCE, CPU_INUM_TIMER, 2 }, #endif { ETS_UART0_INTR_SOURCE, CPU_INUM_UART, 1 }, { ETS_UART1_INTR_SOURCE, CPU_INUM_UART, 1 }, -#if defined(MCU_ESP32) || defined(MCU_ESP32S2) || defined(MCU_ESP32S3) +#if defined(CPU_FAM_ESP32) || defined(CPU_FAM_ESP32S2) || defined(CPU_FAM_ESP32S3) { ETS_UART2_INTR_SOURCE, CPU_INUM_UART, 1 }, #endif { ETS_GPIO_INTR_SOURCE, CPU_INUM_GPIO, 1 }, { ETS_I2C_EXT0_INTR_SOURCE, CPU_INUM_I2C, 1 }, -#if defined(MCU_ESP32) || defined(MCU_ESP32S2) || defined(MCU_ESP32S3) +#if defined(CPU_FAM_ESP32) || defined(CPU_FAM_ESP32S2) || defined(CPU_FAM_ESP32S3) { ETS_I2C_EXT1_INTR_SOURCE, CPU_INUM_I2C, 1 }, #endif -#if defined(MCU_ESP32) +#if defined(CPU_FAM_ESP32) { ETS_ETH_MAC_INTR_SOURCE, CPU_INUM_ETH, 1 }, #endif -#if !defined(MCU_ESP32C2) +#if !defined(CPU_FAM_ESP32C2) { ETS_TWAI_INTR_SOURCE, CPU_INUM_CAN, 1 }, { ETS_TIMER2_INTR_SOURCE, CPU_INUM_FRC2, 2 }, #endif -#if !defined(MCU_ESP32) +#if !defined(CPU_FAM_ESP32) { ETS_SYSTIMER_TARGET2_EDGE_INTR_SOURCE, CPU_INUM_SYSTIMER, 2 }, #endif }; diff --git a/cpu/esp32/periph/adc.c b/cpu/esp32/periph/adc.c index 8acb739bf7..2641038182 100644 --- a/cpu/esp32/periph/adc.c +++ b/cpu/esp32/periph/adc.c @@ -62,7 +62,7 @@ typedef struct { * Table for resolution mapping */ _adc_esp_res_map_t _adc_esp_res_map[] = { -#if defined(MCU_ESP32) +#if defined(CPU_FAM_ESP32) { .res = ADC_WIDTH_BIT_9, .shift = 3 }, /* ADC_RES_6BIT */ { .res = ADC_WIDTH_BIT_9, .shift = 1 }, /* ADC_RES_8BIT */ { .res = ADC_WIDTH_BIT_10, .shift = 0 }, /* ADC_RES_10BIT */ diff --git a/cpu/esp32/periph/gpio.c b/cpu/esp32/periph/gpio.c index b0c5c4d3bd..b7659db7b5 100644 --- a/cpu/esp32/periph/gpio.c +++ b/cpu/esp32/periph/gpio.c @@ -81,7 +81,7 @@ static bool _gpio_pin_pu[GPIO_PIN_NUMOF] = { }; static bool _gpio_pin_pd[GPIO_PIN_NUMOF] = { }; #endif -#if defined(MCU_ESP32) +#if defined(CPU_FAM_ESP32) #define GPIO_IN_GET(b) (b < 32) ? GPIO.in & BIT(b) : GPIO.in1.val & BIT(b-32) #define GPIO_OUT_SET(b) if (b < 32) GPIO.out_w1ts = BIT(b); else GPIO.out1_w1ts.val = BIT(b-32) diff --git a/cpu/esp32/periph/i2c_hw.c b/cpu/esp32/periph/i2c_hw.c index 231f5fe6ad..52682dda73 100644 --- a/cpu/esp32/periph/i2c_hw.c +++ b/cpu/esp32/periph/i2c_hw.c @@ -393,7 +393,7 @@ int i2c_write_bytes(i2c_t dev, uint16_t addr, const void *data, size_t len, uint return _i2c_status_to_errno(dev); } -#if defined(MCU_ESP32) +#if defined(CPU_FAM_ESP32) #define I2C_NACK_INT_ENA_M I2C_ACK_ERR_INT_ENA_M #endif diff --git a/cpu/esp32/periph/rtt_hw_rtc.c b/cpu/esp32/periph/rtt_hw_rtc.c index 5694942b13..6ba7c0d1e7 100644 --- a/cpu/esp32/periph/rtt_hw_rtc.c +++ b/cpu/esp32/periph/rtt_hw_rtc.c @@ -98,14 +98,14 @@ uint64_t _rtc_get_counter(void) { /* trigger timer register update */ RTCCNTL.time_update.update = 1; -#if defined(MCU_ESP32) +#if defined(CPU_FAM_ESP32) /* wait until values in registers are valid */ while (!RTCCNTL.time_update.valid) { ets_delay_us(1); } /* read the time from 48-bit counter and return */ return (((uint64_t)RTCCNTL.time1.val) << 32) + RTCCNTL.time0; -#elif defined(MCU_ESP32C3) +#elif defined(CPU_FAM_ESP32C3) /* read the time from 48-bit counter and return */ return (((uint64_t)RTCCNTL.time_high0.val) << 32) + RTCCNTL.time_low0; #else diff --git a/cpu/esp32/periph/spi.c b/cpu/esp32/periph/spi.c index b75a2e2a67..1def1797d1 100644 --- a/cpu/esp32/periph/spi.c +++ b/cpu/esp32/periph/spi.c @@ -267,7 +267,7 @@ void IRAM_ATTR spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t cl spi_ll_master_set_clock_by_reg(_spi[bus].periph->hw, &_spi[bus].timing.clock_reg); -#if defined(MCU_ESP32C3) +#if defined(CPU_FAM_ESP32C3) /* * If the SPI mode has been changed, the clock signal is only set to the * correct level at the beginning of the transfer on the ESP32C3. However, @@ -283,7 +283,7 @@ void IRAM_ATTR spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t cl spi_transfer_bytes(bus, GPIO_UNDEF, false, &temp, &temp, 1); _spi[bus].mode_last = mode; } -#elif defined(MCU_ESP32) +#elif defined(CPU_FAM_ESP32) /* This workaround isn't needed on ESP32 */ #else #error Platform implementation is missing @@ -301,9 +301,9 @@ void IRAM_ATTR spi_release(spi_t bus) mutex_unlock(&_spi[bus].lock); } -#if defined(MCU_ESP32) +#if defined(CPU_FAM_ESP32) static const char* _spi_names[] = { "CSPI/FSPI", "HSPI", "VSPI" }; -#elif defined(MCU_ESP32C3) +#elif defined(CPU_FAM_ESP32C3) static const char* _spi_names[] = { "SPI", "FSPI" }; #else #error Platform implementation required diff --git a/cpu/esp32/periph/timer.c b/cpu/esp32/periph/timer.c index fee20911b0..47e0d2369e 100644 --- a/cpu/esp32/periph/timer.c +++ b/cpu/esp32/periph/timer.c @@ -76,7 +76,7 @@ * timer implementation together! */ -#if defined(MCU_ESP32) +#if defined(CPU_FAM_ESP32) #define HW_TIMER_CORRECTION (RTC_PLL_320M / CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ) #define HW_TIMER_DELTA_MIN (MAX(HW_TIMER_CORRECTION << 1, 5)) @@ -106,7 +106,7 @@ struct _hw_timer_desc_t { static const struct _hw_timer_desc_t _timers_desc[] = { -#if defined(MCU_ESP32) +#if defined(CPU_FAM_ESP32) { .module = PERIPH_TIMG0_MODULE, .group = TIMER_GROUP_0, diff --git a/cpu/esp32/startup.c b/cpu/esp32/startup.c index 792422e175..ef88a38e4c 100644 --- a/cpu/esp32/startup.c +++ b/cpu/esp32/startup.c @@ -220,7 +220,7 @@ static NORETURN void IRAM system_init (void) { static_assert(MAXTHREADS >= 3, "ESP32 requires at least 3 threads, esp_timer, idle, and main"); -#if defined(MCU_ESP32) +#if defined(CPU_FAM_ESP32) /* enable cached read from flash */ Cache_Read_Enable(PRO_CPU_NUM); #endif diff --git a/cpu/esp32/syscalls.c b/cpu/esp32/syscalls.c index f2c742f868..a8f93f46d1 100644 --- a/cpu/esp32/syscalls.c +++ b/cpu/esp32/syscalls.c @@ -264,10 +264,10 @@ void IRAM syscalls_init_arch(void) timer_hal_set_auto_reload(&sys_timer, false); timer_hal_set_counter_enable(&sys_timer, true); -#if defined(MCU_ESP32) +#if defined(CPU_FAM_ESP32) syscall_table_ptr_pro = &s_stub_table; syscall_table_ptr_app = &s_stub_table; -#elif defined(MCU_ESP32S2) +#elif defined(CPU_FAM_ESP32S2) syscall_table_ptr_pro = &s_stub_table; #else syscall_table_ptr = &s_stub_table; @@ -334,7 +334,7 @@ void system_wdt_init(void) wdt_hal_write_protect_enable(&mwdt); wdt_hal_write_protect_enable(&rwdt); -#if defined(MCU_ESP32) +#if defined(CPU_FAM_ESP32) DEBUG("%s TIMERG0 wdtconfig0=%08x wdtconfig1=%08x wdtconfig2=%08x " "wdtconfig3=%08x wdtconfig4=%08x regclk=%08x\n", __func__, TIMERG0.wdt_config0.val, TIMERG0.wdt_config1.val,