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3 Commits

Author SHA1 Message Date
Koen Zandberg
bef82edf43
fe310: Adapt peripherals to use the plic driver 2020-08-31 16:26:43 +02:00
Francisco Molina
442b11d0ee
cpu/fe310: add unified rtt configuration 2020-08-12 14:46:59 +02:00
kenrabold
7d1d5e77d8 cpu/fe310: add RISC-V cpu FE310 
New CPU FE310 from SiFive based on RISC-V architecture

build: add makefile for RISC-V builds

Makefile for builds using RISC-V tools
 2018-05-29 15:21:45 -07:00