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8804 Commits

Author SHA1 Message Date
benpicco
837bc0c5ed
Merge pull request #20428 from cogip/fdcan
can: add CAN FD support to STM32G4 and native architecture
2025-02-10 16:31:39 +00:00
Dylan Laduranty
17bceaba09
Merge pull request #21179 from dylad/pr/cpu/sam3/optimize_gpio_isr
cpu/sam3: optimize gpio ISR processing
2025-02-05 20:55:02 +00:00
Marian Buschsieweke
423e5ad690
cpu/esp_common: create partitions.csv more robustly
The generated `partitions.csv` needs to state the size of the flash
file. This so far used `ls -l | awk '{print $5}'` to achieve that, but
that is not robust, as the columns of `ls -l` depend on the tool and
system configuration used.

This commit replaces the call with `wc -c`, which should be more robust,
as `wc -c` behavior is POSIX specified.

Co-Authored-By: Karl Fessel <karl.fessel@ml-pa.com>
Co-Authored-By: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2025-02-04 17:51:12 +01:00
Marian Buschsieweke
c48525fc4e
cpu/samd5x/periph_can: fix RX
CAN required CLK_CANx_APB and CLK_CANx_APB to be running and will not
request any clock by itself. We can ensure both clocks to be running
by preventing the MCU from entering IDLE state.

The SAMD5x/SAME5x Family Data Sheet says in Section
"39.6.9 Sleep Mode Operation" says:

> The CAN can be configured to operate in any idle sleep mode. The CAN
> cannot operate in Standby sleep mode.
>
> [...]
>
> To leave low power mode, CLK_CANx_APB and GCLK_CANx must be active
> before writing CCCR.CSR to '0'. The CAN will acknowledge this by
> resetting CCCR.CSA = 0. Afterwards, the application can restart CAN
> communication by resetting bit CCCR.INIT.

tl;dr: At most SAM0_PM_IDLE is allowed while not shutting down the CAN
controller, but even that will pause communication (including RX).

Apparently, the CAN controller was never tested without also using the
USB peripheral, which kept the clocks running as side effect.
2025-02-01 14:13:42 +01:00
dylad
193390bbdd cpu/sam3: optimize gpio ISR processing
Signed-off-by: dylad <dylan.laduranty@mesotic.com>
2025-01-31 10:24:34 +01:00
Dylan Laduranty
6d641ffcf5 cpu/sam3: fix hwrng peripheral register access
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2025-01-30 20:59:09 +01:00
Benjamin Valentin
c791ff278f cpu/sam0_eth: fix hang with broken PHY 2025-01-30 11:16:18 +01:00
Gilles DOFFE
f5ee91d357 cpu/native: enable CAN FD support
As CAN FD is already supported by SocketCAN on Linux, just enable the
fdcan pseudomodule and allow CAN FD frames.

Signed-off-by: Gilles DOFFE <gilles.doffe@rtone.fr>
2025-01-29 20:51:23 +01:00
Gilles DOFFE
5d48376a21 cpu/stm32: add FDCAN support to STM32G4 family
Until now, STM32 MCUs classic CAN support is coded in can.c file.
However CAN FD in STM32G4 family is designed in a very different way:
* CAN FD channels are independant
* CAN FD channel configuration is done in a dedicated RAM block called
  message RAM, with one message RAM per channel
* Each message RAM is divided this way:
  - 11-bit filter (28 elements / 28 words)
  - 29-bit filter (8 elements / 16 words)
  - Rx FIFO 0 (3 elements / 54 words)
  - Rx FIFO 1 (3 elements / 54 words)
  - Tx event FIFO (3 elements / 6 words)
  - Tx buffers (3 elements / 54 words)

Due to these design differences with other STM32 MCUs, the choice is
made to split the driver in two files:
* classiccan.c for STM32 MCUs that support classical CAN. This file
  has just been renamed (previously can.c) to avoid build conflicts
  but does not introduce changes
* fdcan.c for STM32 MCUs that support CAN FD

Message RAM definitions is not provided in CMSIS headers of the STM32G4
family, they are defined in fdcandev_stm32.h. Those definitions could be
extracted to a new file for each STM32 families as some differences
exist with other STM32 families that support CAN FD (for instance
STM32H7). This could be done in a futher commit, according to new
families requirements.

CAN hardware parameters stay similar and are kept in can_params.h.

There are 36 filters per channel:
* 28 first filters are standard ID (11 bit) filters
* 8 last filters are extended ID (29 bit) filters

On each Tx frame sent, the STM32G4 can store Tx events in a dedicated
FIFO. This feature is not yet implemented and Tx event FIFO is disabled
by default.
Automatic retransmission on arbitration loss is enabled by default by
the STM32G4.

About Rx, if no filter is configured, all frames are accepted by
default.

Signed-off-by: Gilles DOFFE <gilles.doffe@rtone.fr>
2025-01-29 20:51:23 +01:00
Gilles DOFFE
ae51a22fbb can: use frame len instead of can_dlc
RIOT implementation of CAN bus relies on SocketCAN model.
Since commit c398e56 (can: add optional DLC element to Classical CAN
frame structure), '__u8 can_dlc' attribute of struct can_frame is
considered as deprecated in SocketCAN and kept for legacy support.
Attribute '__u8 len' should be used instead.

	union {
		/* CAN frame payload length in byte (0 .. CAN_MAX_DLEN)
		 * was previously named can_dlc so we need to carry that
		 * name for legacy support
		 */
		__u8 len;
		__u8 can_dlc; /* deprecated */
	};

Moreover, CAN FD frame structure does not support legacy attribute
'can_dlc', making 'len' mandatory for incoming CAN FD support in RIOT.

	struct canfd_frame {
		canid_t can_id;  /* 32 bit CAN_ID + EFF/RTR/ERR flags */
		__u8    len;     /* frame payload length in byte */
		__u8    flags;   /* additional flags for CAN FD */
		__u8    __res0;  /* reserved / padding */
		__u8    __res1;  /* reserved / padding */
		__u8    data[CANFD_MAX_DLEN]
__attribute__((aligned(8)));
	};

Signed-off-by: Gilles DOFFE <gilles.doffe@rtone.fr>
2025-01-29 20:51:22 +01:00
mguetschow
4321173610
Merge pull request #20982 from Lukas-Luger/pr/nrf802154-beacon
cpu/nrf52/radio/nrf802154: fix beacon acceptance
2025-01-28 18:37:28 +00:00
lulu254b
a5823397bc cpu/nrf52/radio/nrf802154: fix beacon frame acceptance in _l2filter 2025-01-28 19:28:34 +01:00
mguetschow
e8be6eec09
Merge pull request #21168 from dylad/pr/cpu/sam3/fix_pmc_access
cpu/sam3: fix PMC enable/disable peripheral clock access
2025-01-28 09:13:45 +00:00
Dylan Laduranty
b4d061943d cpu/sam3: fix PMC enable/disable peripheral clock access
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2025-01-27 21:38:14 +01:00
Kevin "Tristate Tom" Weiss
a3836cfdd2
Merge pull request #21097 from benpicco/riotboot/minimal
bootloaders/riotboot: don't change CPU/pin state
2025-01-20 16:20:01 +00:00
Benjamin Valentin
581bd8afad cpu: add documentation for DISABLE_BOARD_INIT/DISABLE_CPU_INIT 2025-01-20 13:20:35 +01:00
Benjamin Valentin
5e2ec9d51d cpu/cortexm_common: add option to skip hardware init 2025-01-20 13:20:35 +01:00
Gunar Schorcht
ba3224310e cpu/esp32: changes for the future gcc version 14.2.0
To avoid type conflicts between the `pthread_rwlockattr_t` definition in RIOT's `pthread` implementation and newlibc's `sys/_pthreadtypes.h`, the macro `_POSIX_READER_WRITER_LOCKS` must be undefined.
2025-01-20 09:06:59 +01:00
Gunar Schorcht
8b791dae7b cpu/esp32: cleanup in syscalls_init_arch
The cleanup removes the code that is no longer needed with the cleanup of the linker scripts for ESP ROMs.
2025-01-19 18:51:25 +01:00
Gunar Schorcht
ba6c2061fb cpu/esp32: cleanup used linker scripts
The cleanup reduces the number of linker scripts used for the ESP32x ROMs and thus the symbols used from the ESP32x ROMs. It works with both gcc 12.2 and gcc 14.2. The latter gcc version is a prerequisite for ESP-IDF v5.2 and higher and thus a prerequisite for starting the work on the RIOT-OS port for the latest version of ESP-IDF.
2025-01-19 18:51:25 +01:00
Gunar Schorcht
68ea25967d cpu/esp32: use ESP32x ROM libgcc linker Script for all ESP32x SoCs 2025-01-19 18:51:25 +01:00
Gunar Schorcht
81fa366730 cpu/esp32: changes the order of ESP32x ROM linker scripts 2025-01-19 18:51:25 +01:00
Marian Buschsieweke
f4fcac25f6
Merge pull request #21011 from crasbe/pr/stm32l0_adc_fix
cpu/stm32l0,l1: Fix ADC initialization order
2025-01-15 20:56:07 +00:00
mguetschow
1be4c88e69
Merge pull request #21094 from benpicco/dist/tools/esptools-esp8266
dist/tools/esptools: add support for installing esp8266 toolchain
2025-01-09 12:34:13 +00:00
Benjamin Valentin
efe978530e cpu/esp*: update documentation of esptools 2025-01-09 13:26:51 +01:00
Benjamin Valentin
7fab445e94 cpu/samd5x: add support for SAM E51 2025-01-07 11:36:45 +01:00
Benjamin Valentin
2a511e47e1 cpu/sam0_common: fix same51 vendor header files
cpu/sam0_common/include/vendor/fix_headers.sh
2025-01-07 11:36:45 +01:00
Benjamin Valentin
d0d62bf181 cpu/sam0_common: import vendor files for same51
Atmel Software Framework (ASF) provides a set of low-level header
files that give access to different hardware peripherals of Atmel's
ICs.

Origin: Atmel SAME51 Series Device Support (1.1.139)
License: Apache-2.0
URL: http://packs.download.atmel.com/Atmel.SAME51_DFP.1.1.139.atpack
2025-01-07 11:36:45 +01:00
benpicco
243ca3114b
Merge pull request #20843 from benpicco/string_writer
sys/string_utils: add string_writer helper
2024-12-20 16:36:09 +00:00
Benjamin Valentin
46259fb27e cpu/atxmega: set HAS_FLASH_UTILS_ARCH 2024-12-17 13:59:37 +01:00
Dylan Laduranty
808827c325
Merge pull request #21043 from benpicco/cpu/sam0-flashpage/cachedis
cpu/sam0_common: flashpage: disable cache while writing
2024-12-15 10:57:10 +00:00
crasbe
17ee40dafa cpu/stm32l1: fix ADC initialization & resolution setting
Co-authored-by: benpicco <benpicco@googlemail.com>
2024-12-13 21:38:21 +01:00
Marian Buschsieweke
28753e3509
Merge pull request #21075 from maribu/sys/net/nanocoap/buffer-overflow-separate-response
sys/net/nanocoap: fix buffer overflow in separate response handling
2024-12-12 20:36:55 +00:00
Marian Buschsieweke
5fe7a2e44b
cpu/avr8_common: fix C++ compatibility of unistd.h
C++ does not know about `restrict`, but both g++ and clang++ support
`__restrict`, as do `clang` and GCC [1].

Using `__restrict` instead of `restrict` is also what glibc does.

[1]: https://en.wikipedia.org/wiki/Restrict#Support_by_C++_compilers
2024-12-12 14:28:27 +01:00
krzysztof-cabaj
bb982ad3b2 cpu/stm32/eth: improve defines concerning checksum 2024-12-10 17:49:03 +01:00
krzysztof-cabaj
428a424581 cpu/stm32/eth: fix RX_DESC_STAT_ES define 2024-12-03 17:11:11 +01:00
Marian Buschsieweke
faa3727b1f
cpu/cortexm_common: Make cpu.h IWYU clean
There is clearly no reason `cpu.h` should `#include <stdio.h>`.

Also add an export pragma to `cpu_conf.h`, as portable code is
expected to include `cpu.h` (which exists across MCU families in RIOT),
and not `cpu_conf.h` (which only exists for some MCU families).
2024-11-27 11:57:20 +01:00
Marian Buschsieweke
0dfd83938f
{cpu,drivers}/periph_gpio_ll: add missing include
For `gpio_ll_print_conf()` we need to include `<stdio.h>`, when not
using `fmt.h`.
2024-11-27 09:06:56 +01:00
Benjamin Valentin
fd49d16cba cpu/sam0_common: flashpage: don't disable interruipts while writing 2024-11-26 14:04:35 +01:00
Benjamin Valentin
1320d97e89 cpu/sam0_common: flashpage: disable cache while writing
fix errata 2.14.1: NVM Read Corruption
2024-11-26 14:02:08 +01:00
Marian Buschsieweke
87ae06a33e
Merge pull request #21015 from benpicco/cpu/native-netdev_tap-new_api
netdev_tap: port to `netdev_new_api`
2024-11-22 06:29:10 +00:00
Marian Buschsieweke
33195d7965
cpu/sam{d21,d5x,l21}: Claim support for BlackMagic Probe
Using `PROGRAMMER=bmp` has been proven to work reliably at least on
SAMD21, SAMD5x and SAML21.

Since using unsupported programmers is treated as a warning, this change
only reduces the noise in the shell a bit and is not a functional
change.

[1]: https://black-magic.org/supported-targets.html
2024-11-21 17:20:48 +01:00
Benjamin Valentin
3ba131c0f2 netdev_tap: port to netdev_new_api 2024-11-21 11:45:33 +01:00
benpicco
2bce94a7c7
Merge pull request #21012 from benpicco/netdev_new_api-relax
netdev_new_api: allow `.send()` to return > 0 to signal synchronos send
2024-11-20 22:28:26 +00:00
Benjamin Valentin
4eb1c35fe3 cpu/sam0_eth: fix return values of sam0_eth_send() 2024-11-20 18:17:22 +01:00
benpicco
1938002526
Merge pull request #20926 from Enoch247/fix-stm32-periph-timer-spurious-irq
cpu/stm32/periph/timer: prevent spurious IRQs
2024-11-20 16:24:49 +00:00
Joshua DeWeese
f24fc69118 cpu/stm32/periph/timer: fix whitespace style 2024-11-19 21:50:23 -05:00
crasbe
2f8b23a596 cpu/stm32l0: fix ADC initialization order 2024-11-18 20:54:53 +01:00
Marian Buschsieweke
387f970b50
Merge pull request #20999 from maribu/cpu/sam0_common/gpio_ll/fix-gpio_get_port
cpu/sam0_common/periph_gpio_ll: fix gpio_get_port() and gpio_ll_query_conf()
2024-11-18 19:10:44 +00:00
Marian Buschsieweke
0222b8c54c
cpu/sam0_common/periph_gpio_ll: fix gpio_query_conf()
For the other MCUs, we take the input register state instead of the
output register state when the pin is configured as input. Let's do
the same here, as this is a lot more useful and intuitive.
2024-11-18 14:27:14 +01:00