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6722 Commits

Author SHA1 Message Date
Francisco Molina
8c35335668
cpu/cc2538/cpu: cleanup clock intialization 2020-03-21 19:32:22 +01:00
benpicco
5aff374f3d
Merge pull request #13670 from gschorcht/cpu/esp8266/add_rtt_based_rtc 
cpu/esp8266: add RTT based RTC
 2020-03-21 13:29:48 +01:00
Gunar Schorcht
b7781c77d6 cpu/esp8266: add RTT based RTC 
fixup! cpu/esp8266: add RTT based RTC
 2020-03-21 08:49:51 +01:00
Marius
aae86e860f
cpu/stm32l4: add support for STM32L412KB 2020-03-20 18:48:31 +01:00
Francisco
b98e4bf0d1
Merge pull request #13658 from fjmolinas/pr_periph_timer_cc2538 
cpu/cc2538: fix GPT3 IRQ definition
 2020-03-20 14:31:05 +01:00
benpicco
829671d504
Merge pull request #13640 from gschorcht/cpu/esp8266/periph_rtt 
cpu/esp8266: add RTT implementation
 2020-03-19 17:42:20 +01:00
Gunar Schorcht
df19c6d1b4
Merge pull request #13519 from benpicco/rtt_rtc 
drivers/rtt_rtc: add RTT based RTC implementation, enable it for cpu/cc2538, nrf5x_common
 2020-03-19 17:18:43 +01:00
Francisco Molina
226e1b5daf
cpu/cc2538: fix GPT3 timer IRQ definition 2020-03-19 16:31:57 +01:00
Benjamin Valentin
f8d61edba0 cpu/nrf5x_common: use RTT based RTC implementation 2020-03-19 15:25:14 +01:00
Benjamin Valentin
f9346e1e2b cpu/cc2538: use RTT based RTC implementation 2020-03-19 15:25:14 +01:00
Gunar Schorcht
4ac8f8df4c
Merge pull request #13646 from benpicco/BACKUP_RAM 
cpu: add BACKUP_RAM attribute
 2020-03-19 15:09:30 +01:00
Gunar Schorcht
464e3a8741 cpu/esp8266: add RTT implementation 2020-03-19 13:59:58 +01:00
Benjamin Valentin
69551d4a74 cpu/lpc2387: define BACKUP_RAM attribute 2020-03-19 13:38:50 +01:00
Benjamin Valentin
b8e18d521f cpu/esp32: define BACKUP_RAM attribute 2020-03-19 13:37:58 +01:00
Benjamin Valentin
a11bcdcd5c cpu/cortexm_common: define BACKUP_RAM attribute 2020-03-19 13:37:58 +01:00
Gunar Schorcht
920d54b226 cpu/esp32/esp_wifi: integrate WPA2 Enterprise mode 2020-03-17 17:51:29 +01:00
Gunar Schorcht
ae647ed95f cpu/esp32/esp_wifi: Makefile integration for WPA2 Enterprise mode 2020-03-17 17:51:29 +01:00
Francisco
d77ecc1cde
Merge pull request #13598 from benpicco/cpu/cc2538-spi-fix 
cpu/cc2538: fix spi_transfer_bytes()
 2020-03-17 17:29:49 +01:00
Jean Pierre Dudey
f1af3ae043
cc26x0: add AON_RTC definitions 
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-03-16 19:36:54 -05:00
Jean Pierre Dudey
1bb689ff45
cc26x2_cc13x2: add AON_RTC definitions 
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-03-16 19:36:54 -05:00
Jean Pierre Dudey
20439cc3cc
cc26xx_cc13xx: add RFC_DBELL/RFC_PWR definitions 
This definition is compatible with `cc26x0` and `cc26x2_cc13x2`.

The only difference is (cc26x0 -> cc26x2_cc13x2):

- IRQ13 -> FG_COMMAND_STARTED
- IRQ12 -> COMMAND_STARTED

Those IRQs aren't used on cc26x0 radio so it shouldn't affect anything.
 2020-03-16 19:36:54 -05:00
Jean Pierre Dudey
ec4fccb3f7
cc26xx_cc13xx: add PERIPH_BASE_NONBUF 
Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
 2020-03-16 19:30:31 -05:00
Kaspar Schleiser
7be303f12f
Merge pull request #7583 from haukepetersen/add_sam3_rtt 
cpu/sam3: added RTT driver
 2020-03-12 21:30:05 +01:00
Martine Lenders
5defa1ae34
Merge pull request #13466 from gschorcht/fix_compilation_with_ndebug 
tests: fix compilation problems with NDEBUG
 2020-03-12 19:34:33 +01:00
Gunar Schorcht
b7b244b6d9 cpu/stm32_common: fix NDEBUG compile problem 2020-03-12 18:04:42 +01:00
Gunar Schorcht
b2356d29c5 cpu/nrf51: fix NDEBUG compile problem 2020-03-12 18:04:42 +01:00
benpicco
d5c7d28b38
Merge pull request #10745 from kaspar030/make_idle_stacksize_configurable 
cpu: make default idle/main stacksizes configurable on all archs
 2020-03-12 14:38:32 +01:00
Kaspar Schleiser
b0e7d6abd6 cpu/atmega32u4: make THREAD_STACKSIZE_IDLE configurable 2020-03-12 13:35:43 +01:00
Kaspar Schleiser
c86ccfcf67 cpu: esp32: make THREAD_STACKSIZE_IDLE/DEFAULT configurable 2020-03-12 13:01:13 +01:00
Kaspar Schleiser
84745365fd cpu: atmega_common: make THREAD_STACKSIZE_IDLE configurable 2020-03-12 13:01:13 +01:00
Kaspar Schleiser
14ed03074e cpu: lpc2387: make THREAD_STACKSIZE_IDLE configurable 2020-03-12 13:01:13 +01:00
benpicco
5d038a24bf
Merge pull request #13510 from benpicco/cpu/cc2538-pm 
cpu/cc2538: implement periph/pm
 2020-03-12 12:18:18 +01:00
benpicco
52cc02c9a9
Merge pull request #13387 from nmeum/mpu_noexec_ram_ng 
Add optional support for executable space protections
 2020-03-11 20:00:44 +01:00
Hauke Petersen
ea2910e2f4 cpu/sam3: add periph_rtt driver implementation 2020-03-11 12:53:20 +01:00
Hauke Petersen
e5d940fce8 cpu/sam3: add opt to use external 32khz oscillator 2020-03-11 12:53:04 +01:00
Alexandre Abadie
79431878ac
Merge pull request #13051 from dylad/pr/uart_hw_fc 
cpu/uart: create common uart hw fc module
 2020-03-10 16:41:36 +01:00
Dylan Laduranty
0b15db3694 cpu/nrf5x: use generic hw fc module 2020-03-10 14:47:19 +01:00
Dylan Laduranty
3c47911189 cpu/stm32: use generic hw fc module 2020-03-10 14:34:11 +01:00
Dylan Laduranty
8e2227b18b cpu/cc26xx_cc13xx: use generic hw fc module 2020-03-10 14:22:34 +01:00
Dylan Laduranty
077a15f254 cpu/cc2538: use generic hw fc module 2020-03-10 14:22:34 +01:00
Dylan Laduranty
7a095a80d7 cpu/sam0: use generic hw fc module 2020-03-10 14:22:34 +01:00
benpicco
741b9d3b2d
Merge pull request #13603 from ML-PA-Consulting-GmbH/samd21j17d_add 
cpu/sam0_common: add samd21j17d
 2020-03-10 12:00:25 +01:00
Sören Tempel
59676a1f5e Make sure the mpu_noexec_ram regions has the lowest priority 
From the ARMv7-M ARM section B3.5.3:

	Where there is an overlap between two regions, the register with
	the highest region number takes priority.

We want to make sure the mpu_noexec_ram region has the lowest
priority to allow the mpu_stack_guard region to overwrite the first N
bytes of it.

This change fixes using mpu_noexec_ram and mpu_stack_guard together.
 2020-03-10 11:16:22 +01:00
Benjamin Valentin
5d8c00e302 cpu/cc2538: implement periph/pm 
cc2538 implements 4 sleep modes.
In the lightest mode (3) any interrupt source can wake up the CPU.
In mode 2, only RTT, GPIO or USB may wake the CPU.
In mode 1 only RTT and GPIO can wake the CPU.
In mode 0 only GPIO can wake the CPU.

In mode 0 and 1 the lower 16k RAM are lost. This is a problem since those
are usually used by RIOT.

The linkerscripts in cc2538/ldscripts take different approaches towards that.
Some only use the upper 16k and leave the other half to be managed by the
application.

`cc2538sf53.ld` which is used by `openmote-b` uses the entire RAM starting
at the lower half, so it will not be able to wake up from those modes.

A quick fix to test those modes with `tests/periph_pm` would be

--- a/cpu/cc2538/ldscripts/cc2538sf53.ld
+++ b/cpu/cc2538/ldscripts/cc2538sf53.ld
@@ -21,7 +21,7 @@ MEMORY
 {
     rom (rx)    : ORIGIN = 0x00200000, LENGTH = 512K - 44
     cca         : ORIGIN = 0x0027ffd4, LENGTH = 44
-    ram (w!rx)  : ORIGIN = 0x20000000, LENGTH = 32K
+    ram (w!rx)  : ORIGIN = 0x20004000, LENGTH = 16K
 }
 2020-03-10 10:35:46 +01:00
Benjamin Valentin
eb3f515f55 cpu/sam0_common: gpio: Make use of dedicated GPIO interrupts 
saml1x and samd5x have dedicated interrupts per GPIO line.
Use those instead of iterating over the GPIO status bits
to serve IRQs even faster.
 2020-03-10 10:33:31 +01:00
Alexandre Moguilevski
648a5b9c58 cpu/sam0_common: add samd21j17d 2020-03-10 10:26:45 +01:00
Francisco
1b5f22ec2e
Merge pull request #8410 from OTAkeys/pr/fix_stm32f1_boards 
boards: fix CLOCK_PLL_PREDIV on stm32f1-based boards
 2020-03-10 09:35:48 +01:00
Benjamin Valentin
5c4c45fd3f cpu/sam0_common: gpio: add gpio_disable_mux() function 
Inverse to gpio_init_mux()
 2020-03-09 19:23:33 +01:00
Benjamin Valentin
6540609c35 cpu/sam0_common: gpio: save a few cycles in isr_eic() 
Don't iterate over all bits in the GPIO status register, instead
just loop as many times as there are set bits.
 2020-03-09 18:34:06 +01:00
Vincent Dupont
21bbfbed1d stm32_common/stmclk: check if CLOCK_PLL_PREDIV is valid 2020-03-09 18:00:47 +01:00