- The __NOP() that was added in #8518 is now remooved.
- When DBG_STANDBY, DBG_STOP or DBG_SLEEP are set in DBG_CR a hardfault
occurs on wakeup from sleep. This was first diagnosed in #8518. When
enabled, a hardfault occured when returning from a branch to irq_restore()
we avoid the call by inlining the function call. See #11830 for more
details.
-include will throw no error if sam0_common/Makefile.features does not exist.
This may not have been intentional as none of the other sam0 implementations
do this.
Replace it with a normal include.
Although it isn't explicitly specified in API, gpio_read should return the last written output value for output ports. Since the handling of inputs and outputs is strictly separated by several registers in ESP32, gpio_read returned always the initial value of the input register. Therefore, a case distinction had to make. While for input ports the real value has to be read from the input register, the last written value for the output port has to be read from the output register.
Currently the configuration claims that external interrupt INT4 is present on
pin PE7. However, the ATmega32U4 datasheet (section 10.3.4 page 81) contains
the following remark to pin PE7: "Not present on pin-out". This commit removes
the PE7 from the interrupt config.
- split up interrupt vector code from bootloader.c to vectors.c
- moved bootloader.c to arm7_init.c
- Use consistent naming:
- use lower case for everything but preprocessor stuff
- ISRs now named isr_foo()
- Functions bl_uart_init(), bl_blink(), bl_config_init() declared but never
implemented
--> Removed declarations
- Check for c preprocessor macro CPU_MC1322X is obsolete, as CPU_MC1322X is
nowhere defined in RIOT's code base
- IRQ_Routine() is never used, nor is it ever configured as ISR
- DEBUG_Routine() is never used, nor is it ever configured as ISR
- Moved VIC.c to irq_arch.c for consistent naming scheme
- Removed unused functions IRQenabled, disableFIQ, restoreFIQ, enableFIQ
- There is not header for those functions, so they *cannot* be used
- These is obviously no user, as they *cannot* be used
- There is absolutely no documentation what they would be used for
The `mips32r2_generic` CPU was only used by the `mips-malta` board which has
been removed. The reasons for this removal are the same as for the board:
- No hardware to test.
- The board that used this CPU is not available off the shelf.
- No UART input.
- No integrated flasher (one needs to use a separate Windows tool)
For more information and discussion around MIPS, see issues:
- #11831 (Removal of mips-malta)
- #11788 (General MIPS removal)
cpu/stm32_common: cleanup periph eth
boards/nucleo-f767zi: cleanup dependencies
boards/nucleo-f767zi: fix dma configuration attribute for eth
examples/default: add nucleo-767zi in boards with netif
drivers/stm_32_eth: Add header guard for eth_config
Co-authored-By: Robin <robin@chilio.net>
