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2 Commits

Author SHA1 Message Date
Kaspar Schleiser
847dc3d55c cpu/fe310: implement pm_reset() using watchdog 2019-03-12 11:49:02 +01:00
kenrabold
7d1d5e77d8 cpu/fe310: add RISC-V cpu FE310 
New CPU FE310 from SiFive based on RISC-V architecture

build: add makefile for RISC-V builds

Makefile for builds using RISC-V tools
 2018-05-29 15:21:45 -07:00