4 Commits

Author	SHA1	Message	Date
Benjamin Valentin	55454e9301	cpu/gd32v: timer: add ; after DEBUG()	2021-12-08 18:30:24 +01:00
Benjamin Valentin	90a6d90df8	cpu/gd32v: uart: fix function parameter	2021-11-18 10:14:51 +01:00
Leandro Lanzieri	a015508e77	cpu/gd32v: model Kconfig	2021-10-01 11:26:15 +02:00
Koen Zandberg	3d470b0c12	cpu/gd32v: Initial include of the GD32VF103 device ... This adds support for the gd32v class devices from Gigadevice. The gd32vf103 contains an 108 MHz RISC-V core with similar peripherals as the stm32f1 devices Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>	2021-08-24 14:30:23 +02:00