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7365 Commits

Author SHA1 Message Date
Gunar Schorcht
9facce8c02 cpu/esp8266: use default number of priority levels 
If the WiFi module is used, a number of high priority tasks is created. To void priority collisions with netdev drivers, the number of priorities SCHED_PRIO_LEVELS has to be increased to 32. But in other cases, the default number should be used, also to keep automatic tests working.
 2019-11-14 13:58:25 +01:00
Gunar Schorcht
afa02044f2 cpu/esp8266: required bootloader binaries 2019-11-14 13:58:25 +01:00
Gunar Schorcht
4f4d882f68 cpu/esp32: changes for RTOS SDK 2019-11-14 13:58:25 +01:00
Gunar Schorcht
ddc91df4ca cpu/esp8266: changes for RTOS SDK 2019-11-14 13:58:22 +01:00
Gunar Schorcht
a212228147 cpu/esp8266: files that are not needed any longer removed 2019-11-14 12:04:29 +01:00
Gunar Schorcht
28ea0a0914 cpu/esp8266: required vendor RTOS SDK components added 2019-11-14 12:04:21 +01:00
Kees Bakker
43670aee7b
Merge pull request #12615 from benpicco/samd21-1kHz_gclk 
cpu/samd21: use dedicated 1kHz GCLK4 for RTC and WDT
 2019-11-13 20:25:55 +01:00
Jue
b037bce7ab cpu/stm32_common: fixed RAM_LEN for stm32f105__ and stm32f107__ 2019-11-13 19:58:44 +01:00
Jue
ef9363a509 cpu/stm32_common: fixed RAM_LEN for stm32f103_c 2019-11-13 19:57:59 +01:00
Gunar Schorcht
f397a74948 cpu/esp8266: FreeRTOS adaption layer added for RTOS SDK 2019-11-13 19:00:39 +01:00
Hauke Petersen
4bf14822cb nrf5x: move nimble_ble feat. to cpu 2019-11-13 13:43:55 +01:00
Hauke Petersen
d87228dab1 cpu/nrf52: add feature 'ble_nimble_netif' 2019-11-13 13:05:34 +01:00
Dylan Laduranty
0e736b8879
Merge pull request #12675 from benpicco/sam0-rtt-fix 
cpu/sam0_common: rtt: enable COUNTSYNC in CTRLA
 2019-11-13 10:12:07 +01:00
Bas Stottelaar
0c18ef4f23
Merge pull request #12278 from benemorius/pr/efm32-uart-rx_cb 
cpu/efm32/uart: fix handling of RX when no RX callback is configured
 2019-11-12 21:33:07 +01:00
Dylan Laduranty
6ec6aaf4b0
Merge pull request #12393 from benpicco/sam0-spi_reconfig 
sam0/spi: Don't re-configure SPI device when not needed
 2019-11-12 20:51:53 +01:00
Marian Buschsieweke
ba26aed107
cpu/atmega_common: Restructured code 
Moved macros and static inline helper functions needed to access ATmega GPIOs
to cpu/atmega_common/include/atmega_gpio.h in order to reuse them for the
platform specific low level part of the Neopixel driver.
 2019-11-12 20:15:59 +01:00
benpicco
f77e5a6c6a
Merge pull request #12673 from benpicco/purge-rtc_numof 
boards: remove RTT_NUMOF/RTC_NUMOF
 2019-11-12 11:33:16 +01:00
Benjamin Valentin
d21dc25cfe sam0/spi: Don't re-configure SPI device when not needed 
Currently, spi_acquire() will always re-configure the SPI bus.
If the configuration did not change, this is entirely uneccecary
and makes SPI operations take longer than needed.

Instead, compare the current configuration with the new configuration
and skip the initialisation if it didn't change since the last call.
 2019-11-12 11:31:41 +01:00
Benjamin Valentin
db2fa33660 sam0_common: rtc: use GCLK4 on SAMD21 
The RTC expects to be clocked from a 1kHz source.
Previously it would re-configure GCLK2 from 32kHz to 1kHz when used.

Since GCLK2 is also used by EIC, this would break external interrupts
in strange and unexpected ways.

Dedicate a 1kHz clock to it to avoid the damage.
 2019-11-12 11:30:02 +01:00
Benjamin Valentin
5fa234e435 sam0_common: wdt: use GCLK4 on SAMD21 
GCLK4 will always run at 1kHz on SAMD21, so use it directly.
 2019-11-12 11:29:25 +01:00
Benjamin Valentin
d92c079a90 cpu/samd21: configure GCLK4 with 1024 Hz 
Both WDT and RTC expect a 1 kHz clock.
Source it from the same generator as the 32 kHz GCLK2.
 2019-11-12 11:29:17 +01:00
Benjamin Valentin
89b987494e cpu/sam0_common: rtt: enable COUNTSYNC in CTRLA 
From the data sheet:

> The COUNT register requires synchronization when reading.
> Disabling the synchronization will prevent reading valid
> values from the COUNT register.

Without this bit enabled, rtt_get_counter() will always return 0.
 2019-11-12 11:28:08 +01:00
Benjamin Valentin
3ce6ddcdb2 cpu/atmega_common: cpuid: add a word of warning 
The CPU ID only differs in byte 4 (RC calibration) between devices.

Add a word of warning to the documentation that this may not be very unique.
 2019-11-11 18:07:09 +01:00
Benjamin Valentin
5b6d56efd5 atmega_common: provide CPU ID for every device 
ATmega128RFA1/ATmega256RFR2 do not have a unique CPU ID.

Use the RC oscillator callibration byte as an impromptu CPU ID and rely
on bootlader constants present on all ATmega families for the remaining
bytes.

This way we can provide a faux CPU ID on all ATmega MCUs and typical hobbyists
with no access to JTAG adapters or high voltage programmer capable of writing
the user signature have a good chance that the CPU IDs of their device do not collide.
 2019-11-08 16:58:03 +01:00
Benjamin Valentin
0ea2cbf1eb boards: remove RTT_NUMOF/RTC_NUMOF 
Those macros are defined but never used.
 2019-11-08 14:20:33 +01:00
Marian Buschsieweke
72714aefea
cpu/lpc2387: Added MCU provided features 
Added features provided by the LPC2387 MCU to cpu/lpc2387/Makefile.features
 2019-11-08 14:02:35 +01:00
Gunar Schorcht
dca6d59b60 cpu/esp_common: vendor files changed for RTOS SDK 2019-11-08 13:22:50 +01:00
Gunar Schorcht
a6d01fc2de cpu/esp8266: vendor files changed for RTOS SDK 2019-11-08 10:32:18 +01:00
Gunar Schorcht
464bb9f4c4 cpu/esp8266: vendor files that are no longer needed removed 2019-11-08 10:32:18 +01:00
Leandro Lanzieri
66d5e4d05f
Merge pull request #12637 from benpicco/lpc2387-uart 
cpu/lpc2387: update the UART driver
 2019-11-07 22:21:50 +01:00
Benjamin Valentin
9e68556393 boards/msba2: configure remaining UARTs 
All UARTs on the MSBA2 are exposed through pin headers on the board.
Configure them according to the data sheet.
 2019-11-07 21:55:25 +01:00
Benjamin Valentin
c544c41804 cpu/lpc2387: fix indent 2019-11-07 21:55:24 +01:00
Benjamin Valentin
d6a94d4e18 cpu/lpc2387: uart driver overhaul 
This converts the hard-coded UART driver to the new ways.

 - allow the board to configure the RX & TX pins
 - allow for more than one UART
 - allow setting the baudrate
 - implement poweron()/poweroff() functions
 2019-11-07 21:55:24 +01:00
Alexandre Abadie
7e42f6e4d5
Merge pull request #12659 from aabadie/pr/cpu/atmega_common_wdt 
cpu/atmega_common: add implementation for watchdog
 2019-11-07 12:32:46 +01:00
José Alamos
20ea18637f
Merge pull request #10485 from miri64/gnrc_netif/enh/default-init 
gnrc_netif: assume `netif->ops->init()` to be set to at least a default
 2019-11-07 11:41:05 +01:00
Alexandre Abadie
d22404b8b7
cpu/atmega_common: add implementation for watchdog 2019-11-07 11:35:29 +01:00
Martine Lenders
14a2f6bc18 gnrc: use gnrc_netif_default_init() for all implementations 2019-11-07 11:00:36 +01:00
Bas Stottelaar
d0ff9530d3 cpu/efm32: update vendor code 2019-11-06 23:25:53 +01:00
Benjamin Valentin
5ec9f62a0b cpu/lpc2387: add UART register map 2019-11-04 01:21:08 +01:00
benpicco
926bdc9a9f
Merge pull request #12579 from bergzand/pr/stm32/lpclk_en_dis 
stm32/cpu: Add functions for low power mode clock config
 2019-11-01 23:16:37 +01:00
Koen Zandberg
799823b630
stm32/cpu: Add functions for low power mode clock config 2019-11-01 20:19:41 +01:00
Anton Gerasimov
fa8c0578bf cpu/cc26xx_cc13xx: switch to cortexm.ld linker script 
Signed-off-by: Anton Gerasimov <tossel@gmail.com>
 2019-10-29 21:27:00 +01:00
Anton Gerasimov
9fad1e3b6d cpu/cc26xx_cc13xx: define uart_conf_t 
Replaces older macro-based configuration

Signed-off-by: Anton Gerasimov <tossel@gmail.com>
 2019-10-29 21:27:00 +01:00
Anton Gerasimov
6790e9e6ca cpu/cc26xx_cc13xx: Fix codespell issues 
Signed-off-by: Anton Gerasimov <tossel@gmail.com>
 2019-10-29 21:27:00 +01:00
Anton Gerasimov
1659a71ed0 cpu/cc13x2: Add support for cc13x2 MCUs 
Signed-off-by: Anton Gerasimov <tossel@gmail.com>
 2019-10-29 21:27:00 +01:00
Anton Gerasimov
1442561c8e cpu/cc26x0: Fix register map for WDT 
Signed-off-by: Anton Gerasimov <tossel@gmail.com>
 2019-10-29 21:27:00 +01:00
Anton Gerasimov
f6a3f14d22 cpu/cc26x0: Factor out code common for cc26xx/cc13xx family 
Signed-off-by: Anton Gerasimov <tossel@gmail.com>
 2019-10-29 21:27:00 +01:00
Martine Lenders
ea4b78654f
Merge pull request #12285 from JulianHolzwarth/pr/posix/pthread/pthread_reaper_fix 
sys/posix/pthread/pthread.c: fix pthread reaper
 2019-10-29 18:56:36 +01:00
Marian Buschsieweke
d4adcfd92d
Merge pull request #12581 from benpicco/lpc2387-xtal_select 
cpu/lpc2387: allow for more flexible clock selection
 2019-10-28 12:32:11 +01:00
Benjamin Valentin
d6ca62576d cpu/lpc2387: allow use of other XTALs 
Currently the cpu/lpc2387 init code hard-codes a 16 MHz
external oscillator.
Instead, calculate the PLL multiplier based on the board define
and also allow to run without an external oscillator.
 2019-10-28 11:11:40 +01:00