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37 lines
699 B
C
37 lines
699 B
C
/*
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* SPDX-FileCopyrightText: 2022 Gunar Schorcht
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* SPDX-License-Identifier: LGPL-2.1-only
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*/
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#pragma once
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/**
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* @ingroup cpu_esp32
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* @ingroup config
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* @brief Compile-time configuration macros for ESP32-C3 SoCs
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* @{
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*
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* @file
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* @brief ESP32-C3 specific compile-time configuration
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*/
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#ifndef ESP_ISR_STACKSIZE
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/** Stack size used in interrupt context */
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#define ESP_ISR_STACKSIZE (THREAD_STACKSIZE_DEFAULT)
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#endif /* ESP_ISR_STACKSIZE */
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/** Number of DRAM sections that can be used as heap. */
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#define NUM_HEAPS (1)
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __cplusplus
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}
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#endif
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/** @} */
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