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https://github.com/RIOT-OS/RIOT.git
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181 lines
6.5 KiB
C
181 lines
6.5 KiB
C
/*
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* SPDX-FileCopyrightText: 2025 Gunar Schorcht
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* SPDX-License-Identifier: LGPL-2.1-only
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*/
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#pragma once
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/**
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* @ingroup cpu_esp32
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* @{
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*
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* @file
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* @brief ESP32-C6 specific peripheral configuration
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*/
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#include "sdkconfig.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** Mapping configured ESP32-C6 default clock to CLOCK_CORECLOCK define */
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#define CLOCK_CORECLOCK (1000000UL * CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ)
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/**
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* @brief CPU cycles per busy wait loop
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*/
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#define CPU_CYCLES_PER_LOOP (4)
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/**
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* @name Predefined GPIO names
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* @{
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*/
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#define GPIO0 (GPIO_PIN(PORT_GPIO, 0)) /**< GPIO0 */
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#define GPIO1 (GPIO_PIN(PORT_GPIO, 1)) /**< GPIO1 */
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#define GPIO2 (GPIO_PIN(PORT_GPIO, 2)) /**< GPIO2 */
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#define GPIO3 (GPIO_PIN(PORT_GPIO, 3)) /**< GPIO3 */
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#define GPIO4 (GPIO_PIN(PORT_GPIO, 4)) /**< GPIO4 */
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#define GPIO5 (GPIO_PIN(PORT_GPIO, 5)) /**< GPIO5 */
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#define GPIO6 (GPIO_PIN(PORT_GPIO, 6)) /**< GPIO6 */
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#define GPIO7 (GPIO_PIN(PORT_GPIO, 7)) /**< GPIO7 */
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#define GPIO8 (GPIO_PIN(PORT_GPIO, 8)) /**< GPIO8 */
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#define GPIO9 (GPIO_PIN(PORT_GPIO, 9)) /**< GPIO9 */
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#define GPIO10 (GPIO_PIN(PORT_GPIO, 10)) /**< GPIO10 is not broken out on chips with flash */
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#define GPIO11 (GPIO_PIN(PORT_GPIO, 11)) /**< GPIO11 is not broken out on chips with flash */
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#define GPIO12 (GPIO_PIN(PORT_GPIO, 12)) /**< GPIO12 */
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#define GPIO13 (GPIO_PIN(PORT_GPIO, 13)) /**< GPIO13 */
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#define GPIO14 (GPIO_PIN(PORT_GPIO, 14)) /**< GPIO14 is not usable for chips w/o flash */
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#define GPIO15 (GPIO_PIN(PORT_GPIO, 15)) /**< GPIO15 */
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#define GPIO16 (GPIO_PIN(PORT_GPIO, 16)) /**< GPIO16 */
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#define GPIO17 (GPIO_PIN(PORT_GPIO, 17)) /**< GPIO17 */
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#define GPIO18 (GPIO_PIN(PORT_GPIO, 18)) /**< GPIO18 */
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#define GPIO19 (GPIO_PIN(PORT_GPIO, 19)) /**< GPIO19 */
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#define GPIO20 (GPIO_PIN(PORT_GPIO, 20)) /**< GPIO20 */
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#define GPIO21 (GPIO_PIN(PORT_GPIO, 21)) /**< GPIO21 */
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#define GPIO22 (GPIO_PIN(PORT_GPIO, 22)) /**< GPIO22 */
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#define GPIO23 (GPIO_PIN(PORT_GPIO, 23)) /**< GPIO23 */
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#define GPIO24 (GPIO_PIN(PORT_GPIO, 24)) /**< GPIO24 */
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#define GPIO25 (GPIO_PIN(PORT_GPIO, 25)) /**< GPIO25 is not broken out on chips with flash */
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#define GPIO26 (GPIO_PIN(PORT_GPIO, 26)) /**< GPIO26 is not broken out on chips with flash */
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#define GPIO27 (GPIO_PIN(PORT_GPIO, 27)) /**< GPIO27 is not broken out on chips with flash */
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#define GPIO28 (GPIO_PIN(PORT_GPIO, 28)) /**< GPIO28 is not broken out on chips with flash */
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#define GPIO29 (GPIO_PIN(PORT_GPIO, 29)) /**< GPIO29 is not broken out on chips with flash */
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#define GPIO30 (GPIO_PIN(PORT_GPIO, 30)) /**< GPIO30 is not broken out on chips with flash */
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/** @} */
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/**
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* @name ADC configuration
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*
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* ESP32-C6 integrates one 12-bit ADC (ADC1) with 7 channels:
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*
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* GPIO0, GPIO01, GPIO2, GPIO3, GPIO4, GPIO5 and GPIO6
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*
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* The maximum number of ADC channels #ADC_NUMOF_MAX is 7.
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*/
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/**
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* @name I2C configuration
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*
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* ESP32-C6 has one built-in I2C interfaces.
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*
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* The following table shows the default configuration of I2C interfaces
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* used for ESP32-C6 boards. It can be overridden by
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* [application-specific configurations](#esp32_application_specific_configurations).
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*
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* <center>
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*
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* Device | Signal | Pin | Symbol | Remarks
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* :----------|:-------|:-------|:--------------|:----------------
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* I2C_DEV(0) | | | `#I2C0_SPEED` | default is `I2C_SPEED_FAST`
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* I2C_DEV(0) | SCL | GPIO5 | `#I2C0_SCL` | -
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* I2C_DEV(0) | SDA | GPIO4 | `#I2C0_SDA` | -
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*
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* </center><br>
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*/
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/**
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* @name PWM configuration
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*
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* The ESP32-C6 LEDC module has 1 channel group with 6 channels. Each of
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* these channels can be clocked by one of the 4 timers. This means that
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* it is possible to define up to 4 PWM devices with different frequencies
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* and resolutions and a total of 6 PWM channels.
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*/
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/**
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* @name SPI configuration
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*
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* ESP32-C6 has three SPI controllers where SPI0 and SPI1 share the same bus
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* and can only operate in memory mode while SPI2 can be used as general
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* purpose SPI:
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*
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* - controller SPI0 is reserved for external memories like flash and PSRAM
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* - controller SPI1 is reserved for external memories like flash and PSRAM
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* - controller SPI2 can be used for peripherals (also called FSPI)
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*
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* Thus, only SPI2 (FSPI) can be used as general purpose SPI in RIOT as
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* SPI_DEV(0).
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*
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* The following table shows the pin configuration used by default, even
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* though it **can vary** from board to board.
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*
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* <center>
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*
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* Device (Alias) | Signal | Pin | Symbol | Remarks
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* :-----------------------|:------:|:-------|:-----------:|:------------------
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* `SPI_HOST0`/`SPI_HOST1` | SPICS0 | - | - | reserved for Flash and PSRAM
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* `SPI_HOST0`/`SPI_HOST1` | SPICLK | - | - | reserved for Flash and PSRAM
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* `SPI_HOST0`/`SPI_HOST1` | SPID | - | - | reserved for Flash and PSRAM
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* `SPI_HOST0`/`SPI_HOST1` | SPIQ | - | - | reserved for Flash and PSRAM
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* `SPI_HOST0`/`SPI_HOST1` | SPIHD | - | - | reserved for Flash and PSRAM
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* `SPI_HOST0`/`SPI_HOST1` | SPIWP | - | - | reserved for Flash and PSRAM
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* `SPI_HOST2` (`FSPI`) | SCK | GPIO6 |`#SPI0_SCK` | can be used
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* `SPI_HOST2` (`FSPI`) | MOSI | GPIO7 |`#SPI0_MOSI` | can be used
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* `SPI_HOST2` (`FSPI`) | MISO | GPIO2 |`#SPI0_MISO` | can be used
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* `SPI_HOST2` (`FSPI`) | CS0 | GPIO18 |`#SPI0_CS0` | can be used
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*
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* </center><br>
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*/
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/**
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* @name Timer configuration depending on which implementation is used
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*
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* ESP32-C6 has two timer groups with one channel each.
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*/
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#ifdef MODULE_ESP_HW_COUNTER
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# error "Counter based timers are not supported by ESP32-C6"
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#endif
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/**
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* @name UART configuration
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*
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* ESP32-C6 integrates three UART interfaces, two in the high-power domain and
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* one in the low-power domain. The low-power UART interface is not yet
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* supported. The following default pin configuration of UART interfaces as
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* used by a most
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* boards can be overridden by the application, see section
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* [Application-Specific Configurations](#esp32_application_specific_configurations).
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*
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* <center>
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*
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* Device |Signal|Pin |Symbol |Remarks
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* :-----------|:-----|:-------|:-----------|:----------------
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* UART_DEV(0) | TxD | GPIO16 |`#UART0_TXD`| cannot be changed
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* UART_DEV(0) | RxD | GPIO17 |`#UART0_RXD`| cannot be changed
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* UART_DEV(1) | TxD | - |`#UART1_TXD`| optional, can be overridden (no direct I/O)
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* UART_DEV(1) | RxD | - |`#UART1_RXD`| optional, can be overridden (no direct I/O)
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*
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* </center><br>
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*
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*/
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#ifdef __cplusplus
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}
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#endif
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/** @} */
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