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65 lines
1.5 KiB
C
65 lines
1.5 KiB
C
/*
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* Copyright (C) 2024 BISSELL Homecare, Inc.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32
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* @{
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*
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* @file
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* @brief STM32C0 CPU specific definitions for internal peripheral handling
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*
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* @author Jason Parker <Jason.Parker@bissell.com>
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*/
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#ifndef PERIPH_C0_PERIPH_CPU_H
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#define PERIPH_C0_PERIPH_CPU_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef DOXYGEN
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/**
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* @brief Starting address of the ROM bootloader
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* see application note AN2606
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*/
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#define STM32_BOOTLOADER_ADDR (0x1FFF0000)
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/**
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* @brief Override ADC resolution values
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* @{
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*/
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#define HAVE_ADC_RES_T
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typedef enum {
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ADC_RES_6BIT = (ADC_CFGR1_RES), /**< ADC resolution: 6 bit */
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ADC_RES_8BIT = (ADC_CFGR1_RES_1), /**< ADC resolution: 8 bit */
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ADC_RES_10BIT = (ADC_CFGR1_RES_0), /**< ADC resolution: 10 bit */
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ADC_RES_12BIT = (0x00), /**< ADC resolution: 12 bit */
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ADC_RES_14BIT = (0xfe), /**< ADC resolution: 14 bit (not supported) */
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ADC_RES_16BIT = (0xff) /**< ADC resolution: 16 bit (not supported) */
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} adc_res_t;
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/** @} */
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/**
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* @name Constants for internal VBAT ADC line
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* @{
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*/
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#define VBAT_ADC_RES ADC_RES_12BIT
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#define VBAT_ADC_MAX 4095
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/** @} */
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#endif /* ndef DOXYGEN */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_C0_PERIPH_CPU_H */
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/** @} */
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