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59 lines
1.1 KiB
C
59 lines
1.1 KiB
C
/*
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* SPDX-FileCopyrightText: 2023 Gunar Schorcht <gunar@schorcht.net>
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* SPDX-License-Identifier: LGPL-2.1-only
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*/
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#pragma once
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/**
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* @ingroup boards_common_gd32v
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* @{
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*
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* @file
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* @brief Default USB OTG configuration for GD32 RISC-V board
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*/
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#include "vendor/usbdev_gd32v.h"
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#include "usbdev_synopsys_dwc2.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name USB OTG configuration
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* @{
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*/
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/**
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* @brief Enable the full speed USB OTG peripheral
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*/
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#define DWC2_USB_OTG_FS_ENABLED
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/**
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* @brief Common USB OTG FS configuration
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*/
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static const dwc2_usb_otg_fshs_config_t dwc2_usb_otg_fshs_config[] = {
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{
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.periph = USB_OTG_FS_PERIPH_BASE,
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.type = DWC2_USB_OTG_FS,
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.phy = DWC2_USB_OTG_PHY_BUILTIN,
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.rcu_mask = RCU_AHBEN_USBFSEN_Msk,
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.irqn = USBFS_IRQn,
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.bus = AHB,
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}
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};
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/**
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* @brief Number of available USB OTG peripherals
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*/
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#define USBDEV_NUMOF ARRAY_SIZE(dwc2_usb_otg_fshs_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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/** @} */
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