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46 lines
1.0 KiB
C
46 lines
1.0 KiB
C
/*
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* SPDX-FileCopyrightText: 2018 Inria
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* SPDX-License-Identifier: LGPL-2.1-only
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*/
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#pragma once
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/**
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* @ingroup boards_common_nrf51
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* @{
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*
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* @file
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* @brief Common clock configuration for some nrf51 based boards
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*/
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Clock configuration
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*
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* @note The radio will not work with the internal RC oscillator!
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*
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* @{
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*/
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#define CLOCK_HFCLK (16U) /* set to 0: internal RC oscillator
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16: 16MHz crystal
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32: 32MHz crystal */
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/* LFCLK Source clock selection:*/
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/* - CLOCK_LFCLKSRC_SRC_RC: internal RC oscillator
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* - CLOCK_LFCLKSRC_SRC_Xtal: 32.768 kHz crystal
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* - CLOCK_LFCLKSRC_SRC_Synth: derived from HFCLK */
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#define CLOCK_LFCLK (CLOCK_LFCLKSRC_SRC_RC) /**< LFCLK Source */
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/** @} */
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#ifdef __cplusplus
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} /* end extern "C" */
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#endif
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/** @} */
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