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122 lines
2.2 KiB
C
122 lines
2.2 KiB
C
/*
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* SPDX-FileCopyrightText: 2016 Eistec AB
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* SPDX-License-Identifier: LGPL-2.1-only
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*/
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#pragma once
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/**
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* @ingroup boards_mulle
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* @{
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*
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* @file
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* @brief Board specific configuration of direct mapped ADC
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*
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* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
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*/
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#include "board.h"
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#include "saul/periph.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief ADC configuration
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*/
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static const saul_adc_params_t saul_adc_params[] =
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{
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{
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.name = "k60temp",
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.line = ADC_LINE(0),
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.res = ADC_RES_16BIT,
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},
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{
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.name = "k60vrefsh",
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.line = ADC_LINE(2),
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.res = ADC_RES_16BIT,
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},
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{
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.name = "k60vrefsl",
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.line = ADC_LINE(3),
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.res = ADC_RES_16BIT,
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},
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{
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.name = "k60bandgap",
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.line = ADC_LINE(1),
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.res = ADC_RES_16BIT,
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},
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{
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.name = "DAC0feedback",
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.line = ADC_LINE(4),
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.res = ADC_RES_16BIT,
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},
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{
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.name = "VREFfeedback",
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.line = ADC_LINE(5),
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.res = ADC_RES_16BIT,
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},
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{
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.name = "Vbat",
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.line = MULLE_VBAT_ADC_LINE,
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.res = ADC_RES_16BIT,
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},
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{
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.name = "Vchr",
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.line = MULLE_VCHR_ADC_LINE,
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.res = ADC_RES_16BIT,
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},
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{
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.name = "PGA0_DP",
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.line = ADC_LINE(8),
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.res = ADC_RES_16BIT,
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},
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{
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.name = "PGA0_DM",
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.line = ADC_LINE(9),
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.res = ADC_RES_16BIT,
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},
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{
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.name = "PTA17",
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.line = ADC_LINE(10),
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.res = ADC_RES_16BIT,
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},
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{
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.name = "PTB0",
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.line = ADC_LINE(11),
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.res = ADC_RES_16BIT,
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},
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{
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.name = "PTC0",
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.line = ADC_LINE(12),
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.res = ADC_RES_16BIT,
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},
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{
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.name = "PTC8",
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.line = ADC_LINE(13),
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.res = ADC_RES_16BIT,
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},
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{
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.name = "PTC9",
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.line = ADC_LINE(14),
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.res = ADC_RES_16BIT,
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},
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{
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.name = "PTC10",
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.line = ADC_LINE(15),
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.res = ADC_RES_16BIT,
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},
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{
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.name = "PTC11",
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.line = ADC_LINE(16),
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.res = ADC_RES_16BIT,
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},
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};
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#ifdef __cplusplus
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}
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#endif
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/** @} */
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