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RIOT/cpu/stm32/include/periph/wb/periph_cpu.h
Marian Buschsieweke cac44edec7
tree-wide: replace multiple empty lines with one
For each C source/header `$file`: `sed -e '/^$/N;/^\n$/D' -i $file`.
2025-05-21 22:51:04 +02:00

84 lines
1.8 KiB
C

/*
* Copyright (C) 2019 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
#pragma once
/**
* @ingroup cpu_stm32
* @{
*
* @file
* @brief STM32WB CPU specific definitions for internal peripheral handling
*
* @author Francisco Molina <francois-xavier.molina@inria.fr>
*
*/
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Available number of ADC devices
*/
#if defined(ADC3)
#define ADC_DEVS (3U)
#elif defined(ADC2)
#define ADC_DEVS (2U)
#elif defined(ADC1)
#define ADC_DEVS (1U)
#else
#error "Can't determine the number of ADC devices"
#endif
#if defined(CPU_MODEL_STM32WB55RG)
/**
* @brief ADC voltage regulator start-up time [us]
*/
#define ADC_T_ADCVREG_STUP_US (20)
#endif
#ifndef DOXYGEN
/**
* @brief Starting address of the ROM bootloader
* see application note AN2606
*/
#define STM32_BOOTLOADER_ADDR (0x1FFF0000)
/**
* @brief Override ADC resolution values
* @{
*/
#define HAVE_ADC_RES_T
typedef enum {
ADC_RES_6BIT = (ADC_CFGR_RES), /**< ADC resolution: 6 bit */
ADC_RES_8BIT = (ADC_CFGR_RES_1), /**< ADC resolution: 8 bit */
ADC_RES_10BIT = (ADC_CFGR_RES_0), /**< ADC resolution: 10 bit */
ADC_RES_12BIT = (0x00), /**< ADC resolution: 12 bit */
ADC_RES_14BIT = (0xfe), /**< ADC resolution: 14 bit (not supported) */
ADC_RES_16BIT = (0xff) /**< ADC resolution: 16 bit (not supported) */
} adc_res_t;
/** @} */
/**
* @name Constants for internal VBAT ADC line
* @{
*/
#define VBAT_ADC_RES ADC_RES_12BIT
#define VBAT_ADC_MAX 4095
/** @} */
#endif /* ndef DOXYGEN */
#ifdef __cplusplus
}
#endif
/** @} */