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mirror of https://github.com/RIOT-OS/RIOT.git synced 2025-12-25 06:23:53 +01:00
Marian Buschsieweke 4ed287cec8
cpu/stm32/periph_adc: fix register access
The register access to SMPR1/SMPR2 was incorrect in three aspects:

1. For channels < 10, SMPR1 was cleared but SMPR2 should have been
   cleared
2. The code was not thread-safe
3. An unneeded write was issued. (The compiler won't combine the
   in-place bitwise operations into a single read-modify-write
   sequence on `volatile` memory.)

Fixes https://github.com/RIOT-OS/RIOT/issues/20261
2024-02-08 14:51:25 +01:00
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