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129 lines
2.8 KiB
C
129 lines
2.8 KiB
C
/*
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* SPDX-FileCopyrightText: 2025 Gunar Schorcht
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* SPDX-License-Identifier: LGPL-2.1-only
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*/
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#pragma once
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/**
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* @ingroup cpu_esp8266
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* @{
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*
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* @file
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* @brief Low-level UART driver for source code compatibility with ESP-IDF
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* @author Gunar Schorcht <gunar@schorcht.net>
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*/
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#ifndef DOXYGEN
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#include "esp8266/uart_struct.h"
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#include "esp8266/uart_register.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define UART_SCLK_DEFAULT 1
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#define UART_LL_FIFO_DEF_LEN (128)
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#define UART_LL_INTR_MASK ((uint32_t)~0)
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typedef uart_data_bits_t uart_word_length_t;
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typedef unsigned int soc_module_clk_t;
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static inline void uart_ll_set_sclk(uart_dev_t *hw, soc_module_clk_t source)
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{
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/* dummy function for source code compatibility with ESP32 */
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(void)hw;
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(void)source;
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}
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static inline void uart_ll_set_baudrate(uart_dev_t *hw, uint32_t baud, uint32_t sclk_freq)
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{
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hw->clk_div.val = (sclk_freq / baud) & 0xFFFFF;
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}
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static inline void uart_ll_set_stop_bits(uart_dev_t *hw, uart_stop_bits_t bits)
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{
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hw->conf0.stop_bit_num = bits;
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}
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static inline void uart_ll_set_data_bit_num(uart_dev_t *hw, uart_word_length_t data_bit)
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{
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hw->conf0.bit_num = data_bit;
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}
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static inline void uart_ll_set_parity(uart_dev_t *hw, uart_parity_t parity_mode)
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{
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hw->conf0.parity = (parity_mode & 0x1);
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hw->conf0.parity_en = ((parity_mode >> 1) & 0x1);
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}
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static inline uint32_t uart_ll_get_rxfifo_len(uart_dev_t *hw)
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{
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return hw->status.rxfifo_cnt;
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}
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static inline uint32_t uart_ll_get_txfifo_len(uart_dev_t *hw)
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{
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return UART_LL_FIFO_DEF_LEN - hw->status.txfifo_cnt;
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}
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static inline void uart_ll_read_rxfifo(uart_dev_t *hw, uint8_t *buf, uint32_t rd_len)
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{
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for (int i = 0; i < (int)rd_len; i++) {
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buf[i] = hw->fifo.rw_byte;
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}
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}
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static inline void uart_ll_write_txfifo(uart_dev_t *hw, const uint8_t *buf, uint32_t wr_len)
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{
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for (int i = 0; i < (int)wr_len; i++) {
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hw->fifo.rw_byte = (int)buf[i];
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}
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}
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static inline void uart_ll_rxfifo_rst(uart_dev_t *hw)
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{
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hw->conf0.rxfifo_rst = 1;
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hw->conf0.rxfifo_rst = 0;
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}
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static inline void uart_ll_txfifo_rst(uart_dev_t *hw)
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{
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hw->conf0.rxfifo_rst = 1;
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hw->conf0.rxfifo_rst = 0;
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}
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static inline void uart_ll_set_rxfifo_full_thr(uart_dev_t *hw, uint16_t full_thrhd)
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{
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hw->conf1.rxfifo_full_thrhd = full_thrhd;
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}
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static inline uint32_t uart_ll_get_intsts_mask(uart_dev_t *hw)
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{
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return hw->int_st.val;
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}
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static inline void uart_ll_ena_intr_mask(uart_dev_t *hw, uint32_t mask)
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{
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hw->int_ena.val = hw->int_ena.val | mask;
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}
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static inline void uart_ll_clr_intsts_mask(uart_dev_t *hw, uint32_t mask)
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{
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hw->int_clr.val = mask;
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}
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static inline uint32_t uart_ll_get_intr_ena_status(uart_dev_t *hw)
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{
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return hw->int_ena.val;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* DOXYGEN */
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/** @} */
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