Yegor Yefremov ca8f74a0b0 cpu/stm32_common: use correct data bits macro ...

USART_CR1_M combines both USART_CR1_M0 and USART_CR1_M1 macros
affecting bits 12 and 28 on 7 data bits capable UARTs. Whereas
for other UARTs USART_CR1_M macro affects only bit 12.

This patch fixes wrong data bits usage on 7 data bits capable
UARTs with using USART_CR1_M0 macro for modes 8-E-x and 8-O-x.

It also simplifies bits unsetting as USART_CR1_M macro clears
all data bits related bits for both UART types.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>

2019-03-17 18:58:34 +01:00

..

dist

cpu/stm32_common: fix clk_conf

2017-10-11 12:39:02 +02:00

include

cpu/stm32l1: add support for STOP & STAND_BY mode

2019-03-13 09:57:17 +01:00

ldscripts

stm32_common: Adjust ldscript memory segment attributes

2018-05-09 06:49:29 +02:00

periph

cpu/stm32_common: use correct data bits macro

2019-03-17 18:58:34 +01:00

cpu_common.c

cpu/stm32_common: add support for lpuart

2018-12-13 12:39:00 +01:00

cpu_init.c

cpu/stm32_common: add DMA implementation for F2/F4/F7

2018-05-23 11:09:46 +02:00

doc.txt

cpu/stm32_common: update doc

2017-09-01 10:15:26 +02:00

Makefile

cpu/stm32_common: build common module

2016-03-16 12:17:16 +01:00

Makefile.features

cpu/stm32_common: add support for uart_mode routine

2019-01-31 14:15:20 +01:00

Makefile.include

cpu/stm32_common: remove inadapted periph_flash_common

2018-10-11 15:20:44 +02:00

stm32_mem_lengths.mk

cpu/stm32_common: add variable for SRAM2 length on stm32l47xxx

2018-07-17 17:52:12 +02:00

stmclk_common.c

cpu/stm32_common: always enable PWR module

2018-03-06 14:55:32 +01:00

stmclk_l0l1.c

cpu/stm32_common: always enable PWR module

2018-03-06 14:55:32 +01:00

stmclk.c

cpu/stm32_common: fix extra PLL enabling

2017-09-01 10:26:04 +02:00