Jean Pierre Dudey 6829dfdf1b

cc26xx_cc13xx: fix FLASH->CFG offset, update VIMS ...

- Changed "meh" to "Reserved".
- Renamed CTL to CFG to match SDK/TRM name.
- Added constants for VIMS and FLASH necessary to trim registers.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>

2020-04-29 18:16:45 -05:00

..

cc26xx_cc13xx_ccfg.h

cc26xx_cc13xx: fix CCFG offset on x2 variants

2020-04-14 17:15:56 -05:00

cc26xx_cc13xx_gpio.h

cpu/cc26x0: Factor out code common for cc26xx/cc13xx family

2019-10-29 21:27:00 +01:00

cc26xx_cc13xx_gpt.h

cpu/cc26x0: Factor out code common for cc26xx/cc13xx family

2019-10-29 21:27:00 +01:00

cc26xx_cc13xx_i2c.h

cpu/cc26x0: Factor out code common for cc26xx/cc13xx family

2019-10-29 21:27:00 +01:00

cc26xx_cc13xx_ioc.h

cc26xx_cc13xx: update AON_IOC register bank

2020-04-29 18:16:45 -05:00

cc26xx_cc13xx_power.h

cc26xx_cc13xx: add API to manage peripheral clocks

2020-03-23 09:33:53 -05:00

cc26xx_cc13xx_rfc.h

cc26xx_cc13xx: add RFC_DBELL/RFC_PWR definitions

2020-03-16 19:36:54 -05:00

cc26xx_cc13xx_uart.h

cc26xx_cc13xx: fix UART1 initialization

2020-04-08 12:24:02 -05:00

cc26xx_cc13xx_vims.h

cc26xx_cc13xx: fix FLASH->CFG offset, update VIMS

2020-04-29 18:16:45 -05:00

cc26xx_cc13xx_wdt.h

cpu/cc26x0: Fix register map for WDT

2019-10-29 21:27:00 +01:00

cc26xx_cc13xx.h

cc26x2_cc13x2: add 16-bit masked access to DDI_0_OSC

2020-04-29 18:16:45 -05:00

cpu_conf_cc26xx_cc13xx.h

cc26xx_cc13xx: add RFC_DBELL/RFC_PWR definitions

2020-03-16 19:36:54 -05:00

periph_cpu_common.h

cpu/cc26xx_cc13xx: use generic hw fc module

2020-03-10 14:22:34 +01:00