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80 lines
2.1 KiB
C
80 lines
2.1 KiB
C
/*
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* Copyright (C) 2019 Koen Zandberg
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* 2022 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup drivers_periph_usbdev
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* @{
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*
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* @file
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* @brief Low level USB FS/HS driver definitions for MCUs with Synopsys DWC2 IP core
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*
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* @author Koen Zandberg <koen@bergzand.net>
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* @author Gunar Schorcht <gunar@schorcht.net>
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*/
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#ifndef USBDEV_SYNOPSYS_DWC2_H
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#define USBDEV_SYNOPSYS_DWC2_H
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief USB OTG peripheral type.
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*
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* High speed peripheral is assumed to have DMA support available.
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*
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* @warning Only one of each type is supported at the moment, it is not
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* supported to have two FS type or two HS type peripherals enabled on a
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* single MCU.
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*/
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typedef enum {
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DWC2_USB_OTG_FS = 0, /**< Full speed peripheral */
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DWC2_USB_OTG_HS = 1, /**< High speed peripheral */
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} dwc2_usb_otg_fshs_type_t;
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#if defined(MCU_STM32)
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/**
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* @brief Type of USB OTG peripheral phy.
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*
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* The FS type only supports the built-in type, the HS phy can have either the
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* FS built-in phy enabled or the HS ULPI interface enabled.
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*/
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typedef enum {
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DWC2_USB_OTG_PHY_BUILTIN,
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DWC2_USB_OTG_PHY_ULPI,
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} dwc2_usb_otg_fshs_phy_t;
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#endif
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/**
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* @brief stm32 USB OTG configuration
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*/
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typedef struct {
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uintptr_t periph; /**< USB peripheral base address */
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dwc2_usb_otg_fshs_type_t type; /**< FS or HS type */
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#if defined(MCU_STM32)
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dwc2_usb_otg_fshs_phy_t phy; /**< Built-in or ULPI phy */
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uint32_t rcc_mask; /**< bit in clock enable register */
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uint8_t irqn; /**< IRQ channel */
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uint8_t ahb; /**< AHB bus */
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gpio_t dm; /**< Data- gpio */
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gpio_t dp; /**< Data+ gpio */
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gpio_af_t af; /**< Alternative function */
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#endif /* defined(MCU_STM32) */
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} dwc2_usb_otg_fshs_config_t;
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#ifdef __cplusplus
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}
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#endif
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#endif /* USBDEV_SYNOPSYS_DWC2_H */
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/** @} */
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