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82 lines
2.4 KiB
C
82 lines
2.4 KiB
C
/*
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* Copyright (C) 2017, 2019 Ken Rabold, JP Bonn
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_fe310
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* @{
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*
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* @file cpu.c
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* @brief Implementation of the CPU initialization for SiFive FE310
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*
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* @author Ken Rabold
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* @}
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*/
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#include "cpu.h"
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#include "periph/init.h"
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/**
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* @brief Initialize the CPU, set IRQ priorities, clocks, peripheral
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*/
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void cpu_init(void)
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{
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/* Initialize IRQs */
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irq_init();
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/* Initialize clock */
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clock_init();
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/* Initialize newlib-nano library stubs */
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nanostubs_init();
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/* Initialize static peripheral */
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periph_init();
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}
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/*
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* By default the SPI FFMT initialized as:
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* cmd_en = 1
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* addr_len = 3
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* cmd_code = 3
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* all other fields = 0
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*/
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__attribute__ ((section (".ramfunc")))
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void init_flash(void)
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{
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/* Update the QSPI interface to adjust to the CPU speed
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* This function needs to execute from the RAM
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* when the QSPI interface is being reconfigured because the flash
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* can't be accessed during this time
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*/
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/* Disable SPI flash mode */
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SPI0_REG(SPI_REG_FCTRL) &= ~SPI_FCTRL_EN;
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/* Enable QPI mode by sending command to flash */
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SPI0_REG(SPI_REG_TXFIFO) = 0x35;
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/* begin{code-style-ignore} */
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SPI0_REG(SPI_REG_FFMT) = /* setup "Fast Read Quad I/O (QPI mode)" */
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SPI_INSN_CMD_EN | /* Enable memory-mapped flash */
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SPI_INSN_ADDR_LEN(3) | /* 25LP03D read commands have 3 address bytes */
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SPI_INSN_PAD_CNT(6) | /* 25LP03D Table 6.11 Read Dummy Cycles = 6 */
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SPI_INSN_CMD_PROTO(SPI_PROTO_Q) | /* 25LP03D Table 8.1 "Instruction */
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SPI_INSN_ADDR_PROTO(SPI_PROTO_Q) | /* Set" shows mode for cmd, addr, and */
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SPI_INSN_DATA_PROTO(SPI_PROTO_Q) | /* data protocol for given instruction */
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SPI_INSN_CMD_CODE(0xEB) | /* Set the instruction to "Fast Read Quad I/O" */
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SPI_INSN_PAD_CODE(0x00); /* Dummy cycle sends 0 value bits */
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/* end{code-style-ignore} */
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/* Re-enable SPI flash mode */
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SPI0_REG(SPI_REG_FCTRL) |= SPI_FCTRL_EN;
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/* Adjust the SPI clk divider for to boost flash speed */
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// SPI0_REG(SPI_REG_SCKDIV) = SCKDIV;
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}
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