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51 lines
985 B
C
51 lines
985 B
C
/*
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* SPDX-FileCopyrightText: 2024 Gunar Schorcht
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* SPDX-License-Identifier: LGPL-2.1-only
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*/
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#pragma once
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/**
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* @ingroup cpu_esp32
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* @{
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*
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* @file
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* @brief Default SDK configuration for the ESP32 SoC bootloader
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*/
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#ifndef DOXYGEN
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
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# define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160
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#endif
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#define CONFIG_XTAL_FREQ 40
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#define CONFIG_ESP_DEBUG_OCDAWARE 1
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#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x1000
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#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
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#define CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4 1
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#define CONFIG_EFUSE_MAX_BLK_LEN 192
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#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0000
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#define CONFIG_MMU_PAGE_SIZE 0x10000
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#define CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 1
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#define CONFIG_ESP_INT_WDT 1
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#define CONFIG_ESP_INT_WDT_TIMEOUT_MS 300
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#define CONFIG_ESP_INT_WDT_CHECK_CPU 1
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#ifdef __cplusplus
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}
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#endif
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#endif /* DOXYGEN */
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/** @} */
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