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a2e1b92e1d
For RISC-V and Cortex-M-not-3, triples are known and have worked in some configuration, but do not work at the moment and stay disabled until the reference platforms (native, M3) have been established well.
60 lines
1.7 KiB
Makefile
60 lines
1.7 KiB
Makefile
FEATURES_PROVIDED += arch_32bit
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FEATURES_PROVIDED += arch_arm
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FEATURES_PROVIDED += cortexm_svc
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FEATURES_PROVIDED += cpp
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FEATURES_PROVIDED += cpu_check_address
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FEATURES_PROVIDED += cpu_core_cortexm
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FEATURES_PROVIDED += dbgpin
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FEATURES_PROVIDED += libstdcpp
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FEATURES_PROVIDED += newlib
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FEATURES_PROVIDED += periph_pm
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FEATURES_PROVIDED += puf_sram
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FEATURES_PROVIDED += picolibc
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FEATURES_PROVIDED += ssp
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# cortex-m4f and cortex-m7 provide FPU support
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ifneq (,$(filter $(CPU_CORE),cortex-m4f cortex-m7))
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FEATURES_PROVIDED += cortexm_fpu
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endif
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# Set CPU_ARCH depending on the CPU_CORE
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#
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# RUST_TARGET is only used when building Rust code; any users need to require
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# the `rust_target` feature to esnure things are checked properly.
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ifeq ($(CPU_CORE),cortex-m0)
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CPU_ARCH := armv6m
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#RUST_TARGET = thumbv6m-none-eabi
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else ifeq ($(CPU_CORE),cortex-m0plus)
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CPU_ARCH := armv6m
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#RUST_TARGET = thumbv6m-none-eabi
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else ifeq ($(CPU_CORE),cortex-m23)
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CPU_ARCH := armv8m
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else ifeq ($(CPU_CORE),cortex-m3)
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CPU_ARCH := armv7m
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RUST_TARGET = thumbv7m-none-eabi
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else ifeq ($(CPU_CORE),cortex-m33)
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CPU_ARCH := armv8m
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else ifeq ($(CPU_CORE),cortex-m4)
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CPU_ARCH := armv7m
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RUST_TARGET = thumbv7em-none-eabi
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else ifeq ($(CPU_CORE),cortex-m4f)
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CPU_ARCH := armv7m
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RUST_TARGET = thumbv7em-none-eabihf
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else ifeq ($(CPU_CORE),cortex-m7)
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CPU_ARCH := armv7m
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else
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$(error Unkwnown cortexm core: $(CPU_CORE))
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endif
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ifneq (,$(RUST_TARGET))
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FEATURES_PROVIDED += rust_target
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endif
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FEATURES_PROVIDED += no_idle_thread
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# This configuration enables modules that are only available when using Kconfig
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# module modelling
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ifeq (1, $(TEST_KCONFIG))
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KCONFIG_CPU_CONFIG += $(RIOTCPU)/cortexm_common/cortexm_common.config
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endif
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