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52 lines
860 B
C
52 lines
860 B
C
/*
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* SPDX-FileCopyrightText: 2019 Inria
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* SPDX-License-Identifier: LGPL-2.1-only
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*/
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#pragma once
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/**
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* @ingroup boards_common_stm32
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* @{
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*
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* @file
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* @brief Common configuration for STM32 Timer peripheral based on TIM5
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*/
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Timer configuration
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* @{
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*/
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static const timer_conf_t timer_config[] = {
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{
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.dev = TIM5,
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.max = 0xffffffff,
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#if defined(RCC_APB1ENR1_TIM5EN)
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.rcc_mask = RCC_APB1ENR1_TIM5EN,
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#else
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.rcc_mask = RCC_APB1ENR_TIM5EN,
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#endif
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.bus = APB1,
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.irqn = TIM5_IRQn
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}
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};
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#define TIMER_0_ISR isr_tim5
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#define TIMER_NUMOF ARRAY_SIZE(timer_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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/** @} */
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