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7d1d5e77d8
New CPU FE310 from SiFive based on RISC-V architecture build: add makefile for RISC-V builds Makefile for builds using RISC-V tools
3 lines
65 B
Makefile
3 lines
65 B
Makefile
FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_pm
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