mirror of
https://github.com/RIOT-OS/RIOT.git
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144 lines
3.6 KiB
C
144 lines
3.6 KiB
C
/*
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* SPDX-FileCopyrightText: 2016 OTA keys
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* SPDX-License-Identifier: LGPL-2.1-only
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*/
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#pragma once
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/**
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* @ingroup boards_nucleo-f042k6
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the nucleo-f042k6 board
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*
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* @author Vincent Dupont <vincent@otakeys.com>
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*/
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#include "periph_cpu.h"
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#include "clk_conf.h"
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#include "cfg_timer_tim2.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.dev = USART2,
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.rcc_mask = RCC_APB1ENR_USART2EN,
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.rx_pin = GPIO_PIN(PORT_A, 15),
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.tx_pin = GPIO_PIN(PORT_A, 2),
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.rx_af = GPIO_AF1,
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.tx_af = GPIO_AF1,
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.bus = APB1,
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.irqn = USART2_IRQn
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},
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{
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.dev = USART1,
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.rcc_mask = RCC_APB2ENR_USART1EN,
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.rx_pin = GPIO_PIN(PORT_A, 10),
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.tx_pin = GPIO_PIN(PORT_A, 9),
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.rx_af = GPIO_AF1,
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.tx_af = GPIO_AF1,
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.bus = APB2,
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.irqn = USART1_IRQn
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}
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};
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#define UART_0_ISR (isr_usart2)
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#define UART_1_ISR (isr_usart1)
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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/**
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* @name PWM configuration
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* @{
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*/
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static const pwm_conf_t pwm_config[] = {
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{
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.dev = TIM1,
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.rcc_mask = RCC_APB2ENR_TIM1EN,
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.chan = { { .pin = GPIO_PIN(PORT_A, 8) /* D9 */, .cc_chan = 0 },
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{ .pin = GPIO_UNDEF, .cc_chan = 0 },
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{ .pin = GPIO_UNDEF, .cc_chan = 0 },
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{ .pin = GPIO_UNDEF, .cc_chan = 0 } },
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.af = GPIO_AF2,
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.bus = APB2
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},
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{
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.dev = TIM14,
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.rcc_mask = RCC_APB1ENR_TIM14EN,
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.chan = { { .pin = GPIO_PIN(PORT_B, 1) /* D6 */, .cc_chan = 0 },
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{ .pin = GPIO_UNDEF, .cc_chan = 0 },
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{ .pin = GPIO_UNDEF, .cc_chan = 0 },
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{ .pin = GPIO_UNDEF, .cc_chan = 0 } },
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.af = GPIO_AF0,
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.bus = APB1
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},
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{
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.dev = TIM3,
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.rcc_mask = RCC_APB1ENR_TIM3EN,
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.chan = { { .pin = GPIO_PIN(PORT_B, 0) /* D3 */, .cc_chan = 2 },
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{ .pin = GPIO_UNDEF, .cc_chan = 0 },
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{ .pin = GPIO_UNDEF, .cc_chan = 0 },
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{ .pin = GPIO_UNDEF, .cc_chan = 0 }},
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.af = GPIO_AF1,
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.bus = APB1
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}
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};
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#define PWM_NUMOF ARRAY_SIZE(pwm_config)
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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static const spi_conf_t spi_config[] = {
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{
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.dev = SPI1,
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.mosi_pin = GPIO_PIN(PORT_B, 5),
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.miso_pin = GPIO_PIN(PORT_B, 4),
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.sclk_pin = GPIO_PIN(PORT_B, 3),
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.cs_pin = SPI_CS_UNDEF,
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.mosi_af = GPIO_AF0,
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.miso_af = GPIO_AF0,
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.sclk_af = GPIO_AF0,
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.cs_af = GPIO_AF0,
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.rccmask = RCC_APB2ENR_SPI1EN,
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.apbbus = APB2
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}
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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/** @} */
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/**
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* @name ADC configuration
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* @{
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*/
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static const adc_conf_t adc_config[] = {
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{ GPIO_PIN(PORT_A, 0), 0 },
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{ GPIO_PIN(PORT_A, 1), 1 },
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{ GPIO_PIN(PORT_A, 3), 3 },
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{ GPIO_PIN(PORT_A, 4), 4 },
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{ GPIO_PIN(PORT_A, 7), 7 },
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{ GPIO_UNDEF, 18 }, /* VBAT */
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};
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#define VBAT_ADC ADC_LINE(5) /**< VBAT ADC line */
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#define ADC_NUMOF ARRAY_SIZE(adc_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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/** @} */
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