mirror of
https://github.com/RIOT-OS/RIOT.git
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ba6c2061fb
The cleanup reduces the number of linker scripts used for the ESP32x ROMs and thus the symbols used from the ESP32x ROMs. It works with both gcc 12.2 and gcc 14.2. The latter gcc version is a prerequisite for ESP-IDF v5.2 and higher and thus a prerequisite for starting the work on the RIOT-OS port for the latest version of ESP-IDF.
355 lines
12 KiB
Makefile
355 lines
12 KiB
Makefile
# ESP32x specific flashing options
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FLASH_CHIP = $(CPU_FAM)
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export ESP32_SDK_DIR ?= $(PKGDIRBASE)/esp32_sdk
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ifneq (,$(filter usb_board_reset,$(USEMODULE)))
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include $(RIOTMAKE)/tools/usb_board_reset.mk
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endif
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# Serial flasher config as used by the ESP-IDF, be careful when overriding them.
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# They have to be exported to use same values in subsequent makefiles.
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ifeq (esp32,$(CPU_FAM))
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export FLASH_MODE ?= dout
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export FLASH_FREQ ?= 40m
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export FLASH_SIZE ?= 2
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BOOTLOADER_POS = 0x1000
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else ifneq (,$(filter esp32c3 esp32s3,$(CPU_FAM)))
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export FLASH_MODE ?= dio
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export FLASH_FREQ ?= 80m
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export FLASH_SIZE ?= 2
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BOOTLOADER_POS = 0x0000
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else ifneq (,$(filter esp32s2,$(CPU_FAM)))
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export FLASH_MODE ?= qio
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export FLASH_FREQ ?= 80m
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export FLASH_SIZE ?= 4
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BOOTLOADER_POS = 0x1000
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else
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$(error No known flash config for ESP32x SoC variant (family): $(CPU_FAM))
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endif
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# RAM configuration
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ifeq (esp32,$(CPU_FAM))
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ifneq (,$(filter esp_idf_ble,$(USEMODULE)))
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# If BT is used, the first 0xdb5c bytes (ca. 55 kbytes) of RAM are shared
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# with the BT controller. Usable RAM region the starts at 0x3FFBDB5C.
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# We reduce the usable size by 55 kByte.
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RAM_LEN = 120K
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RAM_START_ADDR = 0x3FFBE000
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else
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RAM_LEN = 176K
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RAM_START_ADDR = 0x3FFB0000
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endif
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else ifeq (esp32s2,$(CPU_FAM))
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# The ESP32-S2 configuration in RIOT uses a data cache size and an
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# instruction cache size of 8 kByte each. This means that the usable RAM
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# starts at 0x3FFB0000 + 0x4000 and the size is reduced by 0x4000
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RAM_LEN = 176K
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RAM_START_ADDR = 0x3FFB4000
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else ifeq (esp32s3,$(CPU_FAM))
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RAM_LEN = 264K
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RAM_START_ADDR = 0x3FC88000
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else ifeq (esp32c3,$(CPU_FAM))
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# Note: The address space is shared between the data and the instruction bus.
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# Therefore, a part at the beginning of the RAM is not usable since it is
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# used as instruction cache via the instruction bus.
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RAM_LEN = 320K
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RAM_START_ADDR = 0x3FC80000
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else
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$(error Missing ram configuration for ESP32x SoC variant (family): $(CPU_FAM))
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endif
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ifneq (,$(filter periph_flashpage,$(USEMODULE)))
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ifneq (,$(CONFIG_ESP_FLASHPAGE_CAPACITY_64K))
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FLASHFILE_POS = 0x20000
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FLASHPAGE_CAP = 0x10000
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else ifneq (,$(CONFIG_ESP_FLASHPAGE_CAPACITY_128K))
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FLASHFILE_POS = 0x30000
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FLASHPAGE_CAP = 0x20000
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else ifneq (,$(CONFIG_ESP_FLASHPAGE_CAPACITY_256K))
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FLASHFILE_POS = 0x50000
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FLASHPAGE_CAP = 0x40000
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else ifneq (,$(CONFIG_ESP_FLASHPAGE_CAPACITY_512K))
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FLASHFILE_POS = 0x90000
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FLASHPAGE_CAP = 0x80000
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else ifneq (,$(CONFIG_ESP_FLASHPAGE_CAPACITY_1M))
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FLASHFILE_POS = 0x110000
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FLASHPAGE_CAP = 0x100000
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else ifneq (,$(CONFIG_ESP_FLASHPAGE_CAPACITY_2M))
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FLASHFILE_POS = 0x210000
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FLASHPAGE_CAP = 0x200000
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else
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# use 512 kByte for periph_flashpage by default
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FLASHFILE_POS = 0x90000
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FLASHPAGE_CAP = 0x80000
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CFLAGS += -DCONFIG_ESP_FLASHPAGE_CAPACITY_512K
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endif
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FLASHPAGE_ADDR_START = 0x10000
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FLASHPAGE_ADDR_END = $(FLASHFILE_POS)
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CFLAGS += -DFLASHPAGE_ADDR_START=$(FLASHPAGE_ADDR_START)
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CFLAGS += -DFLASHPAGE_ADDR_END=$(FLASHPAGE_ADDR_END)
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endif
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FLASHFILE_POS ?= 0x10000
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ESPTOOL ?= $(RIOTTOOLS)/esptools/esptool_v3.2.py
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include $(RIOTCPU)/esp_common/Makefile.include
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# regular Makefile
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ifeq (xtensa,$(CPU_ARCH))
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TARGET_ARCH ?= xtensa-$(CPU_FAM)-elf
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else ifeq (rv32,$(CPU_ARCH))
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TARGET_ARCH ?= riscv32-esp-elf
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else
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$(error Unknown ESP32x SoC architecture: $(CPU_ARCH))
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endif
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PSEUDOMODULES += esp_ble
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PSEUDOMODULES += esp_bootloader
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PSEUDOMODULES += esp_gdbstub
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PSEUDOMODULES += esp_hw_counter
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PSEUDOMODULES += esp_idf_gpio_hal
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PSEUDOMODULES += esp_i2c_hw
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PSEUDOMODULES += esp_jtag
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PSEUDOMODULES += esp_lcd_gpio
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PSEUDOMODULES += esp_rtc_timer_32k
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PSEUDOMODULES += esp_spi_ram
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PSEUDOMODULES += esp_spi_oct
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PSEUDOMODULES += esp_wifi_enterprise
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PSEUDOMODULES += stdio_usb_serial_jtag_rx
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INCLUDES += -I$(RIOTCPU)/$(CPU)/esp-idf/include
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INCLUDES += -I$(RIOTCPU)/$(CPU)/esp-idf/include/log
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INCLUDES += -I$(RIOTCPU)/$(CPU)/vendor/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components
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INCLUDES += -I$(ESP32_SDK_DIR)/components/bootloader_support/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/driver/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_common/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/include/soc
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_rom/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_rom/include/$(CPU_FAM)
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_system/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_system/port/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_timer/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/hal/$(CPU_FAM)/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/hal/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/hal/platform_port/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/heap/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/log/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/newlib/platform_include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/soc/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/soc/$(CPU_FAM)/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/spi_flash/include
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ifneq (,$(filter riscv32%,$(TARGET_ARCH)))
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INCLUDES += -I$(ESP32_SDK_DIR)/components/riscv/include
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endif
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ifneq (,$(filter xtensa%,$(TARGET_ARCH)))
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INCLUDES += -I$(ESP32_SDK_DIR)/components/xtensa/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/xtensa/$(CPU_FAM)/include
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endif
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ifneq (,$(filter esp_ble,$(USEMODULE)))
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INCLUDES += -I$(ESP32_SDK_DIR)/components/bt/include/$(CPU_FAM)/include
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endif
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ifneq (,$(filter esp_ble_nimble,$(USEMODULE)))
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INCLUDES += -I$(RIOTCPU)/$(CPU)/include/esp_ble_nimble
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INCLUDES += $(NIMIBASE)/nimble/transport/common/hci_h4/include
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endif
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ifneq (,$(filter esp_spi_ram,$(USEMODULE)))
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_hw_support/include/soc/$(CPU_FAM)
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endif
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ifneq (,$(filter esp_idf_lcd,$(USEMODULE)))
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_lcd/include
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endif
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ifneq (,$(filter esp_idf_spi_flash,$(USEMODULE)))
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INCLUDES += -I$(ESP32_SDK_DIR)/components/spi_flash/include
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endif
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ifneq (,$(filter esp_idf_usb,$(USEMODULE)))
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INCLUDES += -I$(ESP32_SDK_DIR)/components/usb/include
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endif
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ifneq (,$(filter esp_wifi_any,$(USEMODULE)))
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INCLUDES += -I$(ESP32_SDK_DIR)/components/bootloader_support/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_eth/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_event/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_netif/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_wifi/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/nvs_flash/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/spi_flash/include
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endif
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ifneq (,$(filter esp_wifi_enterprise,$(USEMODULE)))
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INCLUDES += -I$(ESP32_SDK_DIR)/components/wpa_supplicant/esp_supplicant/include
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endif
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ifneq (,$(filter esp_eth,$(USEMODULE)))
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INCLUDES += -I$(RIOTCPU)/$(CPU)/esp-eth
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_eth/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_event/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_netif/include
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INCLUDES += -I$(ESP32_SDK_DIR)/components/esp_wifi/include
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endif
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CFLAGS += -DCPU_FAM_$(call uppercase_and_underscore,$(CPU_FAM))
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# we use ESP32 only in single core mode
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CFLAGS += -DCONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
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CFLAGS += -DCONFIG_FREERTOS_UNICORE
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# other ESP-IDF configurations
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CFLAGS += -DCONFIG_IDF_TARGET_$(call uppercase_and_underscore,$(CPU_FAM))
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CFLAGS += -DESP_PLATFORM
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CFLAGS += -DLOG_TAG_IN_BRACKETS
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# extend CFLAGS by the corresponding FLASH_FREQ
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ifeq (20m,$(FLASH_FREQ))
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CFLAGS += -DCONFIG_ESPTOOLPY_FLASHFREQ_20M
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else ifeq (26m,$(FLASH_FREQ))
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CFLAGS += -DCONFIG_ESPTOOLPY_FLASHFREQ_26M
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else ifeq (40m,$(FLASH_FREQ))
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CFLAGS += -DCONFIG_ESPTOOLPY_FLASHFREQ_40M
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else ifeq (80m,$(FLASH_FREQ))
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CFLAGS += -DCONFIG_ESPTOOLPY_FLASHFREQ_80M
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else ifeq (120m,$(FLASH_FREQ))
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CFLAGS += -DCONFIG_ESPTOOLPY_FLASHFREQ_120M
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endif
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#extend CFLAGS by the corresponding FLASH_SIZE
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ifeq (1,$(FLASH_SIZE))
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CFLAGS += -DCONFIG_ESPTOOLPY_FLASHSIZE_1MB
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else ifeq (2,$(FLASH_SIZE))
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CFLAGS += -DCONFIG_ESPTOOLPY_FLASHSIZE_2MB
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else ifeq (4,$(FLASH_SIZE))
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CFLAGS += -DCONFIG_ESPTOOLPY_FLASHSIZE_4MB
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else ifeq (8,$(FLASH_SIZE))
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CFLAGS += -DCONFIG_ESPTOOLPY_FLASHSIZE_8MB
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else ifeq (16,$(FLASH_SIZE))
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CFLAGS += -DCONFIG_ESPTOOLPY_FLASHSIZE_16MB
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endif
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# shortcuts used by ESP-IDF
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CFLAGS += -Dasm=__asm
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CFLAGS += -Dtypeof=__typeof__
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CFLAGS += -D_CONST=const
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# TODO no relaxation yet
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ifneq (,$(filter riscv%,$(TARGET_ARCH)))
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CFLAGS += -mno-relax -march=rv32imc_zicsr_zifencei -mabi=ilp32 -DRISCV_NO_RELAX
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LINKFLAGS += -mno-relax -march=rv32imc_zicsr_zifencei -mabi=ilp32
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GCC_NEW_RISCV_ISA ?= $(shell echo "typedef int dont_be_pedantic;" | \
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$(TARGET_ARCH)-gcc -march=rv32imac -mabi=ilp32 \
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-misa-spec=2.2 -E - > /dev/null 2>&1 && \
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echo 1 || echo 0)
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ifeq (1,$(GCC_NEW_RISCV_ISA))
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CFLAGS += -misa-spec=2.2
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endif
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endif
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ifneq (,$(filter xtensa%,$(TARGET_ARCH)))
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LINKFLAGS += -L$(ESP32_SDK_DIR)/components/xtensa/$(CPU_FAM)
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ARCHIVES += -lxt_hal
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endif
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LINKFLAGS += -L$(RIOTCPU)/$(CPU)/ld/$(CPU_FAM)/
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LINKFLAGS += -T$(BINDIR)/memory.ld
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LINKFLAGS += -T$(BINDIR)/sections.ld
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LINKFLAGS += -T$(ESP32_SDK_DIR)/components/soc/$(CPU_FAM)/ld/$(CPU_FAM).peripherals.ld
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LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.ld
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LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.api.ld
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LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.libgcc.ld
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ifeq (esp32s2,$(CPU_FAM))
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LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.spiflash.ld
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else ifeq (esp32c3,$(CPU_FAM))
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LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.newlib.ld
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LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.eco3.ld
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else ifeq (esp32s3,$(CPU_FAM))
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LINKFLAGS += -T$(ESP32_SDK_DIR)/components/esp_rom/$(CPU_FAM)/ld/$(CPU_FAM).rom.newlib.ld
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endif
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LINKFLAGS += -nostdlib -lgcc -Wl,-gc-sections
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# all ESP32x SoCs have to load executable code into IRAM
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# warning 'LOAD segment with RWX permissions' has to be disabled therefore
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ifeq (1,$(GCC_NEW_RISCV_ISA))
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LINKFLAGS += -Wl,--no-warn-rwx-segments
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endif
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# Libraries needed when using esp_wifi_any pseudomodule
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ifneq (,$(filter esp_wifi_any,$(USEMODULE)))
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LINKFLAGS += -L$(ESP32_SDK_LIB_WIFI_DIR)/$(CPU_FAM)
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LINKFLAGS += -L$(ESP32_SDK_LIB_PHY_DIR)/$(CPU_FAM)
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ARCHIVES += -lcoexist -lcore -lmesh -lnet80211 -lpp
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ARCHIVES += -lphy -lstdc++
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ifeq (esp32,$(CPU_FAM))
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ARCHIVES += -lrtc
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endif
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endif
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# Libraries needed when using esp_now module
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ifneq (,$(filter esp_now,$(USEMODULE)))
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ARCHIVES += -lespnow -lmesh
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endif
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# Libraries needed when using esp_ble
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ifneq (,$(filter esp_ble,$(USEMODULE)))
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LINKFLAGS += -L$(ESP32_SDK_LIB_PHY_DIR)/$(CPU_FAM)
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LINKFLAGS += -L$(ESP32_SDK_LIB_BT_DIR)/$(CPU_FAM)
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ARCHIVES += -lbtdm_app
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ARCHIVES += -lphy -lstdc++
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ifeq (esp32,$(CPU_FAM))
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ARCHIVES += -lrtc
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else ifneq (,$(filter esp32c3 esp32s3,$(CPU_FAM)))
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ARCHIVES += -lbtbb
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endif
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endif
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ifneq (,$(filter cpp,$(USEMODULE)))
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ARCHIVES += -lstdc++
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endif
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ifneq (,$(filter esp_bootloader,$(USEMODULE)))
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# Bootloader file used by esptool.inc.mk
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BOOTLOADER_BIN ?= $(BINDIR)/esp_bootloader/bootloader.bin
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endif
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ifneq (,$(filter esp_jtag,$(USEMODULE)))
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PROGRAMMERS_SUPPORTED += openocd
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PARTITION_POS = 0x8000
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OPENOCD_PRE_FLASH_CMDS = -c 'echo "Installing Bootloader at $(BOOTLOADER_POS)"' \
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-c 'flash write_image erase "$(BOOTLOADER_BIN)" $(BOOTLOADER_POS) bin' \
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-c 'echo "Installing partition table at $(PARTITION_POS)"' \
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-c 'flash write_image erase "$(BINDIR)/partitions.bin" $(PARTITION_POS) bin'
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IMAGE_OFFSET = $(FLASHFILE_POS)
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# Flash checksumming not supported on xtensa
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OPENOCD_SKIP_VERIFY = yes
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# Without resets debug target fails with 'Target not examined yet'
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OPENOCD_DBG_EXTRA_CMD += -c 'reset halt'
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endif
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LD_SCRIPTS += $(BINDIR)/memory.ld $(BINDIR)/sections.ld
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$(BINDIR)/memory.ld: $(RIOTCPU)/$(CPU)/ld/$(CPU_FAM)/memory.ld.in \
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$(BINDIR)/riotbuild/riotbuild.h pkg-prepare
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$(Q)$(CC) -DLD_FILE_GEN $(INCLUDES) -include '$(BINDIR)/riotbuild/riotbuild.h' \
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-I$(RIOTCPU)/$(CPU)/ld -P -x c -E $< -o $@
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$(BINDIR)/sections.ld: $(RIOTCPU)/$(CPU)/ld/$(CPU_FAM)/sections.ld.in \
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$(BINDIR)/riotbuild/riotbuild.h pkg-prepare
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$(Q)$(CC) -DLD_FILE_GEN -include '$(BINDIR)/riotbuild/riotbuild.h' -C -P -x c -E $< -o $@
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$(BOOTLOADER_BIN):
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