From c788fe130f63f808d89c831f951c70394906dbc6 Mon Sep 17 00:00:00 2001 From: Benjamin Valentin Date: Sun, 19 Jul 2020 23:10:24 +0200 Subject: [PATCH 1/2] cpu/mips_pic32_common: GPIO: use bitarithm_test_and_clear() --- cpu/mips_pic32_common/periph/gpio.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/cpu/mips_pic32_common/periph/gpio.c b/cpu/mips_pic32_common/periph/gpio.c index 445dbbd40c..61975a0d82 100644 --- a/cpu/mips_pic32_common/periph/gpio.c +++ b/cpu/mips_pic32_common/periph/gpio.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "eic.h" +#include "bitarithm.h" #include "periph/gpio.h" #include "periph_conf.h" @@ -88,14 +89,13 @@ static gpio_isr_ctx_t isr_ctx[PORT_NUMOF][GPIO_NUMOF]; static void isr_handler(uint32_t port_addr) { uint32_t cnstat = CNSTATx(_port(port_addr)); + uint32_t port = PORTx(_port(port_addr)); cnstat &= (1 << GPIO_NUMOF) - 1; + uint8_t pin = 0; while (cnstat) { - /* we want the position of the first one bit, so N_bits - (N_zeros + 1) */ - int pin = 32 - __builtin_clz(cnstat) - 1; - uint32_t port = PORTx(_port(port_addr)); + cnstat = bitarithm_test_and_clear(cnstat, &pin); - cnstat &= ~(1 << pin); if (isr_flank[_port_num(port_addr)][pin] == GPIO_BOTH || (isr_flank[_port_num(port_addr)][pin] == GPIO_RISING && (port & (1U << pin))) || (isr_flank[_port_num(port_addr)][pin] == GPIO_FALLING && !(port & (1U << pin)))) @@ -132,12 +132,12 @@ static void cn_isr(void) #elif defined(CPU_FAM_PIC32MZ) static void isr_handler(uint32_t port_addr) { - while (CNFx(_port(port_addr))) { - /* we want the position of the first one bit, so N_bits - (N_zeros + 1) */ - int pin = 32 - __builtin_clz(CNFx(_port(port_addr))) - 1; - + uint8_t pin = 0; + unsigned state = CNFx(_port(port_addr)); + CNFx(_port(port_addr)) = 0; + while (state) { + state = bitarithm_test_and_clear(state, &pin); isr_ctx[_port_num(port_addr)][pin].cb(isr_ctx[_port_num(port_addr)][pin].arg); - CNFx(_port(port_addr)) &= ~(1U << pin); } } From 4095eac9f21a794cff1f986221eb79dd3c851f15 Mon Sep 17 00:00:00 2001 From: Benjamin Valentin Date: Thu, 1 Oct 2020 00:13:13 +0200 Subject: [PATCH 2/2] cpu: mips32r2_common: set BITARITHM_HAS_CLZ The MIPS ISA implements CLZ: https://ti.tuwien.ac.at/cps/teaching/courses/cavo/files/MIPS32-IS.pdf For `tests/periph_gpio` this shaves off 20 bytes on `6lowpan-clicker`. --- cpu/mips32r2_common/include/cpu.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/cpu/mips32r2_common/include/cpu.h b/cpu/mips32r2_common/include/cpu.h index 08708b7def..9904991052 100644 --- a/cpu/mips32r2_common/include/cpu.h +++ b/cpu/mips32r2_common/include/cpu.h @@ -32,6 +32,14 @@ extern "C" { #endif +/** + * @brief Select fastest bitarithm_lsb implementation + * @{ + */ +#define BITARITHM_LSB_BUILTIN +#define BITARITHM_HAS_CLZ +/** @} */ + /** * @brief Print the last instruction's address *