diff --git a/cpu/cortexm_common/include/thread_arch.h b/cpu/cortexm_common/include/thread_arch.h new file mode 100644 index 0000000000..e75ec0af57 --- /dev/null +++ b/cpu/cortexm_common/include/thread_arch.h @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2021 Koen Zandberg + * 2021 Inria + * + * This file is subject to the terms and conditions of the GNU Lesser General + * Public License v2.1. See the file LICENSE in the top level directory for more + * details. + */ + +/** + * @ingroup cpu_cortexm_common + * @{ + * + * @file + * @brief Implementation of the kernels thread interface + * + * @author Koen Zandberg + * + * @} + */ +#ifndef THREAD_ARCH_H +#define THREAD_ARCH_H + +#ifdef __cplusplus +extern "C" { +#endif + +#define THREAD_API_INLINED + +#ifndef DOXYGEN /* Doxygen is in core/include/thread.h */ + +static inline __attribute__((always_inline)) void thread_yield_higher(void) +{ + /* trigger the PENDSV interrupt to run scheduler and schedule new thread if + * applicable */ + SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; + /* flush the pipeline. Otherwise we risk that subsequent instructions are + * executed before the IRQ has actually triggered */ + __ISB(); +} + +#endif /* DOXYGEN */ + +#ifdef __cplusplus +} +#endif + +#endif /* THREAD_ARCH_H */ +/** @} */ diff --git a/cpu/cortexm_common/thread_arch.c b/cpu/cortexm_common/thread_arch.c index e6b25e6e67..cb8c9004aa 100644 --- a/cpu/cortexm_common/thread_arch.c +++ b/cpu/cortexm_common/thread_arch.c @@ -296,16 +296,6 @@ void NORETURN cpu_switch_context_exit(void) UNREACHABLE(); } -void thread_yield_higher(void) -{ - /* trigger the PENDSV interrupt to run scheduler and schedule new thread if - * applicable */ - SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; - /* flush the pipeline. Otherwise we risk that subsequent instructions are - * executed before the IRQ has actually triggered */ - __ISB(); -} - #if CPU_CORE_CORTEXM_FULL_THUMB void __attribute__((naked)) __attribute__((used)) isr_pendsv(void) { __asm__ volatile (