cpu/esp*: move periph/i2c_sw to esp/common
This commit is contained in:
Gunar Schorcht
parent
0292f8b6a3
commit
05faec7cf8
@ -39,7 +39,6 @@ TARGET_ARCH ?= xtensa-esp32-elf
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PSEUDOMODULES += esp_eth_hw
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PSEUDOMODULES += esp_gdbstub
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PSEUDOMODULES += esp_hw_counter
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PSEUDOMODULES += esp_i2c_sw
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PSEUDOMODULES += esp_i2c_hw
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PSEUDOMODULES += esp_idf_newlib
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PSEUDOMODULES += esp_rtc_timer
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@ -1,717 +0,0 @@
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/*
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* Copyright (C) 2018 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_esp32
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* @ingroup drivers_periph_i2c
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* @{
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*
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* @file
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* @brief Low-level I2C driver implementation for ESP32 SDK
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*
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* @}
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*/
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/*
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PLEASE NOTE:
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Some parts of the implementation bases on the bit-banging implementation as
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described in [wikipedia](https://en.wikipedia.org/wiki/I%C2%B2C) as well as
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its implementation in [esp-open-rtos](https://github.com/SuperHouse/esp-open-rtos.git).
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These parts are under the copyright of their respective owners.
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*/
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#if defined(MODULE_ESP_I2C_SW) /* software implementation used */
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#include <assert.h>
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#include <errno.h>
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#include <stdbool.h>
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#include "cpu.h"
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#include "log.h"
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#include "mutex.h"
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#include "periph_conf.h"
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#include "periph/gpio.h"
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#include "periph/i2c.h"
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#include "esp_common.h"
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#include "gpio_arch.h"
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#include "rom/ets_sys.h"
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#include "soc/gpio_reg.h"
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#include "soc/gpio_struct.h"
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/* only include the code if one of the IC2 interface bus speeds are defined */
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#if defined(I2C0_SPEED) || defined(I2C1_SPEED)
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/* max clock stretching counter */
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#define I2C_CLOCK_STRETCH 200
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/* gpio access macros */
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#define GPIO_SET(l,h,b) if (b < 32) GPIO.l = BIT(b); else GPIO.h.val = BIT(32-b)
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#define GPIO_GET(l,h,b) ((b < 32) ? GPIO.l & BIT(b) : GPIO.h.val & BIT(32-b))
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typedef struct
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{
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i2c_speed_t speed;
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i2c_t dev;
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bool started;
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gpio_t scl;
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gpio_t sda;
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uint32_t scl_bit; /* gpio bit mask for faster access */
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uint32_t sda_bit; /* gpio bit mask for faster access */
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uint32_t delay;
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mutex_t lock;
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} _i2c_bus_t;
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static _i2c_bus_t _i2c_bus[I2C_NUMOF] = {};
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/* to ensure that I2C is always optimized with -O2 to use the defined delays */
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#pragma GCC optimize ("O2")
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static const uint32_t _i2c_delays[][3] =
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{
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/* values specify one half-period and are only valid for -O2 option */
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/* value = [period - 0.25 us (240 MHz) / 0.5us(160MHz) / 1.0us(80MHz)] */
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/* * cycles per second / 2 */
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/* 1 us = 48 cycles (240) / 32 cycles (160 MHz) / 16 cycles (80 MHz) */
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/* values for 240, 160, 80 MHz */
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[I2C_SPEED_LOW] = {2390, 1590, 790}, /* 10 kbps (period 100 us) */
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[I2C_SPEED_NORMAL] = { 230, 150, 70}, /* 100 kbps (period 10 us) */
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[I2C_SPEED_FAST] = { 51, 31, 11}, /* 400 kbps (period 2.5 us) */
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[I2C_SPEED_FAST_PLUS] = { 15, 7, 0}, /* 1 Mbps (period 1 us) */
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[I2C_SPEED_HIGH] = { 0, 0, 0} /* 3.4 Mbps (period 0.3 us) not working */
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};
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/* forward declaration of internal functions */
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static inline void _i2c_delay (_i2c_bus_t* bus);
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static inline bool _i2c_scl_read (_i2c_bus_t* bus);
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static inline bool _i2c_sda_read (_i2c_bus_t* bus);
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static inline void _i2c_scl_high (_i2c_bus_t* bus);
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static inline void _i2c_scl_low (_i2c_bus_t* bus);
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static inline void _i2c_sda_high (_i2c_bus_t* bus);
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static inline void _i2c_sda_low (_i2c_bus_t* bus);
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static int _i2c_start_cond (_i2c_bus_t* bus);
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static int _i2c_stop_cond (_i2c_bus_t* bus);
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static int _i2c_write_bit (_i2c_bus_t* bus, bool bit);
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static int _i2c_read_bit (_i2c_bus_t* bus, bool* bit);
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static int _i2c_write_byte (_i2c_bus_t* bus, uint8_t byte);
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static int _i2c_read_byte (_i2c_bus_t* bus, uint8_t* byte, bool ack);
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static int _i2c_arbitration_lost (_i2c_bus_t* bus, const char* func);
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static void _i2c_abort (_i2c_bus_t* bus, const char* func);
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static void _i2c_clear (_i2c_bus_t* bus);
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/* implementation of i2c interface */
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void i2c_init(i2c_t dev)
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{
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CHECK_PARAM (dev < I2C_NUMOF)
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if (i2c_config[dev].speed == I2C_SPEED_HIGH) {
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LOG_TAG_INFO("i2c", "I2C_SPEED_HIGH is not supported\n");
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return;
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}
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mutex_init(&_i2c_bus[dev].lock);
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_i2c_bus[dev].scl = i2c_config[dev].scl;
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_i2c_bus[dev].sda = i2c_config[dev].sda;
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_i2c_bus[dev].speed = i2c_config[dev].speed;
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_i2c_bus[dev].dev = dev;
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_i2c_bus[dev].scl_bit = BIT(_i2c_bus[dev].scl); /* store bit mask for faster access */
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_i2c_bus[dev].sda_bit = BIT(_i2c_bus[dev].sda); /* store bit mask for faster access */
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_i2c_bus[dev].started = false; /* for handling of repeated start condition */
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switch (ets_get_cpu_frequency()) {
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case 240: _i2c_bus[dev].delay = _i2c_delays[_i2c_bus[dev].speed][0]; break;
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case 160: _i2c_bus[dev].delay = _i2c_delays[_i2c_bus[dev].speed][1]; break;
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case 80: _i2c_bus[dev].delay = _i2c_delays[_i2c_bus[dev].speed][2]; break;
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default : LOG_TAG_INFO("i2c", "I2C software implementation is not "
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"supported for this CPU frequency: %d MHz\n",
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ets_get_cpu_frequency());
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return;
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}
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DEBUG ("%s scl=%d sda=%d speed=%d\n", __func__,
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_i2c_bus[dev].scl, _i2c_bus[dev].sda, _i2c_bus[dev].speed);
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/* reset the GPIO usage if the pins were used for I2C before */
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if (gpio_get_pin_usage(_i2c_bus[dev].scl) == _I2C) {
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gpio_set_pin_usage(_i2c_bus[dev].scl, _GPIO);
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}
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if (gpio_get_pin_usage(_i2c_bus[dev].sda) == _I2C) {
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gpio_set_pin_usage(_i2c_bus[dev].sda, _GPIO);
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}
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/* try to configure SDA and SCL pin as GPIO in open-drain mode with enabled pull-ups */
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if (gpio_init (_i2c_bus[dev].scl, GPIO_IN_OD_PU) ||
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gpio_init (_i2c_bus[dev].sda, GPIO_IN_OD_PU)) {
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return;
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}
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/* store the usage type in GPIO table */
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gpio_set_pin_usage(_i2c_bus[dev].scl, _I2C);
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gpio_set_pin_usage(_i2c_bus[dev].sda, _I2C);
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/* set SDA and SCL to be floating and pulled-up to high */
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_i2c_sda_high (&_i2c_bus[dev]);
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_i2c_scl_high (&_i2c_bus[dev]);
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/* clear the bus if necessary (SDA is driven permanently low) */
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_i2c_clear (&_i2c_bus[dev]);
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return;
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}
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int i2c_acquire(i2c_t dev)
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{
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CHECK_PARAM_RET (dev < I2C_NUMOF, -1)
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mutex_lock(&_i2c_bus[dev].lock);
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return 0;
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}
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void i2c_release(i2c_t dev)
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{
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assert(dev < I2C_NUMOF);
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mutex_unlock(&_i2c_bus[dev].lock);
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}
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int /* IRAM */ i2c_read_bytes(i2c_t dev, uint16_t addr, void *data, size_t len, uint8_t flags)
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{
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DEBUG ("%s: dev=%u addr=%02x data=%p len=%d flags=%01x\n",
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__func__, dev, addr, data, len, flags);
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CHECK_PARAM_RET (dev < I2C_NUMOF, -EINVAL);
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CHECK_PARAM_RET (len > 0, -EINVAL);
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CHECK_PARAM_RET (data != NULL, -EINVAL);
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_i2c_bus_t* bus = &_i2c_bus[dev];
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int res = 0;
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/* send START condition and address if I2C_NOSTART is not set */
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if (!(flags & I2C_NOSTART)) {
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/* START condition */
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if ((res = _i2c_start_cond (bus)) != 0) {
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return res;
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}
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/* send 10 bit or 7 bit address */
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if (flags & I2C_ADDR10) {
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/* prepare 10 bit address bytes */
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uint8_t addr1 = 0xf0 | (addr & 0x0300) >> 7 | I2C_READ;
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uint8_t addr2 = addr & 0xff;
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/* send address bytes with read flag */
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if ((res = _i2c_write_byte (bus, addr1)) != 0 ||
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(res = _i2c_write_byte (bus, addr2)) != 0) {
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/* abort transfer */
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_i2c_abort (bus, __func__);
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return -ENXIO;
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}
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}
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else {
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/* send address byte with read flag */
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if ((res = _i2c_write_byte (bus, (addr << 1 | I2C_READ))) != 0) {
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/* abort transfer */
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_i2c_abort (bus, __func__);
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return -ENXIO;
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}
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}
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}
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/* receive bytes if send address was successful */
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for (unsigned int i = 0; i < len; i++) {
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if ((res = _i2c_read_byte (bus, &(((uint8_t*)data)[i]), i < len-1)) != 0) {
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/* abort transfer */
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_i2c_abort (bus, __func__);
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return res;
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}
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}
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/* send STOP condition if I2C_NOSTOP flag is not set */
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if (!(flags & I2C_NOSTOP)) {
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_i2c_stop_cond (bus);
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}
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return res;
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}
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int /* IRAM */ i2c_write_bytes(i2c_t dev, uint16_t addr, const void *data, size_t len, uint8_t flags)
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{
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DEBUG ("%s: dev=%u addr=%02x data=%p len=%d flags=%01x\n",
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__func__, dev, addr, data, len, flags);
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CHECK_PARAM_RET (dev < I2C_NUMOF, -EINVAL);
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CHECK_PARAM_RET (len > 0, -EINVAL);
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CHECK_PARAM_RET (data != NULL, -EINVAL);
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_i2c_bus_t* bus = &_i2c_bus[dev];
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int res = 0;
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/* if I2C_NOSTART is not set, send START condition and ADDR */
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if (!(flags & I2C_NOSTART)) {
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/* START condition */
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if ((res = _i2c_start_cond (bus)) != 0) {
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return res;
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}
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/* send 10 bit or 7 bit address */
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if (flags & I2C_ADDR10) {
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/* prepare 10 bit address bytes */
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uint8_t addr1 = 0xf0 | (addr & 0x0300) >> 7;
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uint8_t addr2 = addr & 0xff;
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/* send address bytes without read flag */
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if ((res = _i2c_write_byte (bus, addr1)) != 0 ||
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(res = _i2c_write_byte (bus, addr2)) != 0) {
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/* abort transfer */
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_i2c_abort (bus, __func__);
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return -ENXIO;
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}
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}
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else {
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/* send address byte without read flag */
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if ((res = _i2c_write_byte (bus, addr << 1)) != 0) {
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/* abort transfer */
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_i2c_abort (bus, __func__);
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return -ENXIO;
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}
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}
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}
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/* send bytes if send address was successful */
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for (unsigned int i = 0; i < len; i++) {
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if ((res = _i2c_write_byte (bus, ((uint8_t*)data)[i])) != 0) {
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/* abort transfer */
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_i2c_abort (bus, __func__);
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return res;
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}
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}
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/* send STOP condition if I2C_NOSTOP flag is not set */
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if (!(flags & I2C_NOSTOP)) {
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return _i2c_stop_cond (bus);
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}
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return res;
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}
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void i2c_poweron(i2c_t dev)
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{
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/* since I2C is realized in software there is no device to power on */
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/* just return */
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}
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void i2c_poweroff(i2c_t dev)
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{
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/* since I2C is realized in software there is no device to power off */
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/* just return */
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}
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/* --- internal functions --- */
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static inline void _i2c_delay (_i2c_bus_t* bus)
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{
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/* produces a delay */
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/* ca. 16 cycles = 1 us (80 MHz) or ca. 32 cycles = 1 us (160 MHz) */
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uint32_t cycles = bus->delay;
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if (cycles) {
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__asm__ volatile ("1: _addi.n %0, %0, -1 \n"
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" bnez %0, 1b \n" : "=r" (cycles) : "0" (cycles));
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}
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}
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/*
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* Please note: SDA and SDL pins are used in GPIO_OD_PU mode
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* (open-drain with pull-ups).
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*
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* Setting a pin which is in open-drain mode leaves the pin floating and
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* the signal is pulled up to high. The signal can then be actively driven
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* to low by a slave. A read operation returns the current signal at the pin.
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*
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* Clearing a pin which is in open-drain mode actively drives the signal to
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* low.
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*/
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static inline bool _i2c_scl_read(_i2c_bus_t* bus)
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{
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/* read SCL status (pin is in open-drain mode and set) */
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return GPIO_GET(in, in1, bus->scl);
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}
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static inline bool _i2c_sda_read(_i2c_bus_t* bus)
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{
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/* read SDA status (pin is in open-drain mode and set) */
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return GPIO_GET(in, in1, bus->sda);
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}
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static inline void _i2c_scl_high(_i2c_bus_t* bus)
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{
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/* set SCL signal high (pin is in open-drain mode and pulled-up) */
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GPIO_SET(out_w1ts, out1_w1ts, bus->scl);
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}
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static inline void _i2c_scl_low(_i2c_bus_t* bus)
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{
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/* set SCL signal low (actively driven to low) */
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GPIO_SET(out_w1tc, out1_w1tc, bus->scl);
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}
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static inline void _i2c_sda_high(_i2c_bus_t* bus)
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{
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/* set SDA signal high (pin is in open-drain mode and pulled-up) */
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GPIO_SET(out_w1ts, out1_w1ts, bus->sda);
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}
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static inline void _i2c_sda_low(_i2c_bus_t* bus)
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{
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/* set SDA signal low (actively driven to low) */
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GPIO_SET(out_w1tc, out1_w1tc, bus->sda);
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}
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static void _i2c_clear(_i2c_bus_t* bus)
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{
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DEBUG("%s: dev=%u\n", __func__, bus->dev);
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/**
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* Sometimes a slave blocks and drives the SDA line permanently low.
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* Send some clock pulses in that case (10 at maximum)
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*/
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/*
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* If SDA is low while SCL is high for 10 half cycles, it is not an
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* arbitration lost but a bus lock.
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*/
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int count = 10;
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while (!_i2c_sda_read (bus) && _i2c_scl_read (bus) && count) {
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count--;
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_i2c_delay (bus);
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}
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if (count) {
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/* was not a bus lock */
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return;
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}
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/* send 10 clock pulses in case of bus lock */
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count = 10;
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while (!_i2c_sda_read (bus) && count--) {
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_i2c_scl_low (bus);
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_i2c_delay (bus);
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_i2c_scl_high (bus);
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_i2c_delay (bus);
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}
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}
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|
||||
static void _i2c_abort(_i2c_bus_t* bus, const char* func)
|
||||
{
|
||||
DEBUG("%s: dev=%u\n", func, bus->dev);
|
||||
|
||||
/* reset SCL and SDA to passive HIGH (floating and pulled-up) */
|
||||
_i2c_sda_high (bus);
|
||||
_i2c_scl_high (bus);
|
||||
|
||||
/* reset repeated start indicator */
|
||||
bus->started = false;
|
||||
|
||||
/* clear the bus if necessary (SDA is driven permanently low) */
|
||||
_i2c_clear(bus);
|
||||
}
|
||||
|
||||
static /* IRAM */ int _i2c_arbitration_lost (_i2c_bus_t* bus, const char* func)
|
||||
{
|
||||
DEBUG("%s: arbitration lost dev=%u\n", func, bus->dev);
|
||||
|
||||
/* reset SCL and SDA to passive HIGH (floating and pulled-up) */
|
||||
_i2c_sda_high (bus);
|
||||
_i2c_scl_high (bus);
|
||||
|
||||
/* reset repeated start indicator */
|
||||
bus->started = false;
|
||||
|
||||
/* clear the bus if necessary (SDA is driven permanently low) */
|
||||
_i2c_clear(bus);
|
||||
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
static /* IRAM */ int _i2c_start_cond(_i2c_bus_t* bus)
|
||||
{
|
||||
/*
|
||||
* send start condition
|
||||
* on entry: SDA and SCL are set to be floating and pulled-up to high
|
||||
* on exit : SDA and SCL are actively driven to low
|
||||
*/
|
||||
|
||||
int res = 0;
|
||||
|
||||
if (bus->started) {
|
||||
/* prepare the repeated start condition */
|
||||
|
||||
/* SDA = passive HIGH (floating and pulled-up) */
|
||||
_i2c_sda_high (bus);
|
||||
|
||||
/* t_VD;DAT not necessary */
|
||||
/* _i2c_delay (bus); */
|
||||
|
||||
/* SCL = passive HIGH (floating and pulled-up) */
|
||||
_i2c_scl_high (bus);
|
||||
|
||||
/* clock stretching, wait as long as clock is driven to low by the slave */
|
||||
uint32_t stretch = I2C_CLOCK_STRETCH;
|
||||
while (!_i2c_scl_read (bus) && stretch--) {}
|
||||
if (stretch == 0) {
|
||||
DEBUG("%s: clock stretching timeout dev=%u\n", __func__, bus->dev);
|
||||
res = -ETIMEDOUT;
|
||||
}
|
||||
|
||||
/* wait t_SU;STA - set-up time for a repeated START condition */
|
||||
/* min. in us: 4.7 (SM), 0.6 (FM), 0.26 (FPM), 0.16 (HSM); no max. */
|
||||
_i2c_delay (bus);
|
||||
}
|
||||
|
||||
/* if SDA is low, arbitration is lost and someone else is driving the bus */
|
||||
if (!_i2c_sda_read (bus)) {
|
||||
return _i2c_arbitration_lost (bus, __func__);
|
||||
}
|
||||
|
||||
/* begin the START condition: SDA = active LOW */
|
||||
_i2c_sda_low (bus);
|
||||
|
||||
/* wait t_HD;STA - hold time (repeated) START condition, */
|
||||
/* max none */
|
||||
/* min 4.0 us (SM), 0.6 us (FM), 0.26 us (FPM), 0.16 us (HSM) */
|
||||
_i2c_delay (bus);
|
||||
|
||||
/* complete the START condition: SCL = active LOW */
|
||||
_i2c_scl_low (bus);
|
||||
|
||||
/* needed for repeated start condition */
|
||||
bus->started = true;
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
static /* IRAM */ int _i2c_stop_cond(_i2c_bus_t* bus)
|
||||
{
|
||||
/*
|
||||
* send stop condition
|
||||
* on entry: SCL is active low and SDA can be changed
|
||||
* on exit : SCL and SDA are set to be floating and pulled-up to high
|
||||
*/
|
||||
|
||||
int res = 0;
|
||||
|
||||
/* begin the STOP condition: SDA = active LOW */
|
||||
_i2c_sda_low (bus);
|
||||
|
||||
/* wait t_LOW - LOW period of SCL clock */
|
||||
/* min. in us: 4.7 (SM), 1.3 (FM), 0.5 (FPM), 0.16 (HSM); no max. */
|
||||
_i2c_delay (bus);
|
||||
|
||||
/* SCL = passive HIGH (floating and pulled up) while SDA = active LOW */
|
||||
_i2c_scl_high (bus);
|
||||
|
||||
/* clock stretching, wait as long as clock is driven to low by the slave */
|
||||
uint32_t stretch = I2C_CLOCK_STRETCH;
|
||||
while (!_i2c_scl_read (bus) && stretch--) {}
|
||||
if (stretch == 0) {
|
||||
DEBUG("%s: clock stretching timeout dev=%u\n", __func__, bus->dev);
|
||||
res = -ETIMEDOUT;
|
||||
}
|
||||
|
||||
/* wait t_SU;STO - hold time START condition, */
|
||||
/* min. in us: 4.0 (SM), 0.6 (FM), 0.26 (FPM), 0.16 (HSM); no max. */
|
||||
_i2c_delay (bus);
|
||||
|
||||
/* complete the STOP condition: SDA = passive HIGH (floating and pulled up) */
|
||||
_i2c_sda_high (bus);
|
||||
|
||||
/* reset repeated start indicator */
|
||||
bus->started = false;
|
||||
|
||||
/* wait t_BUF - bus free time between a STOP and a START condition */
|
||||
/* min. in us: 4.7 (SM), 1.3 (FM), 0.5 (FPM), 0.16 (HSM); no max. */
|
||||
_i2c_delay (bus);
|
||||
/* one additional delay */
|
||||
_i2c_delay (bus);
|
||||
|
||||
/* if SDA is low, arbitration is lost and someone else is driving the bus */
|
||||
if (_i2c_sda_read (bus) == 0) {
|
||||
return _i2c_arbitration_lost (bus, __func__);
|
||||
}
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
static /* IRAM */ int _i2c_write_bit (_i2c_bus_t* bus, bool bit)
|
||||
{
|
||||
/*
|
||||
* send one bit
|
||||
* on entry: SCL is active low, SDA can be changed
|
||||
* on exit : SCL is active low, SDA can be changed
|
||||
*/
|
||||
|
||||
int res = 0;
|
||||
|
||||
/* SDA = bit */
|
||||
if (bit) {
|
||||
_i2c_sda_high (bus);
|
||||
}
|
||||
else {
|
||||
_i2c_sda_low (bus);
|
||||
}
|
||||
|
||||
/* wait t_VD;DAT - data valid time (time until data are valid) */
|
||||
/* max. in us: 3.45 (SM), 0.9 (FM), 0.45 (FPM); no min */
|
||||
_i2c_delay (bus);
|
||||
|
||||
/* SCL = passive HIGH (floating and pulled-up), SDA value is available */
|
||||
_i2c_scl_high (bus);
|
||||
|
||||
/* wait t_HIGH - time for the slave to read SDA */
|
||||
/* min. in us: 4 (SM), 0.6 (FM), 0.26 (FPM), 0.09 (HSM); no max. */
|
||||
_i2c_delay (bus);
|
||||
|
||||
/* clock stretching, wait as long as clock is driven low by the slave */
|
||||
uint32_t stretch = I2C_CLOCK_STRETCH;
|
||||
while (!_i2c_scl_read (bus) && stretch--) {}
|
||||
if (stretch == 0) {
|
||||
DEBUG("%s: clock stretching timeout dev=%u\n", __func__, bus->dev);
|
||||
res = -ETIMEDOUT;
|
||||
}
|
||||
|
||||
/* if SCL is high, now data is valid */
|
||||
/* if SDA is high, check that nobody else is driving SDA low */
|
||||
if (bit && !_i2c_sda_read(bus)) {
|
||||
return _i2c_arbitration_lost (bus, __func__);
|
||||
}
|
||||
|
||||
/* SCL = active LOW to allow next SDA change */
|
||||
_i2c_scl_low(bus);
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
static /* IRAM */ int _i2c_read_bit (_i2c_bus_t* bus, bool* bit)
|
||||
{
|
||||
/* read one bit
|
||||
* on entry: SCL is active low, SDA can be changed
|
||||
* on exit : SCL is active low, SDA can be changed
|
||||
*/
|
||||
|
||||
int res = 0;
|
||||
|
||||
/* SDA = passive HIGH (floating and pulled-up) to let the slave drive data */
|
||||
_i2c_sda_high (bus);
|
||||
|
||||
/* wait t_VD;DAT - data valid time (time until data are valid) */
|
||||
/* max. in us: 3.45 (SM), 0.9 (FM), 0.45 (FPM); no min */
|
||||
_i2c_delay (bus);
|
||||
|
||||
/* SCL = passive HIGH (floating and pulled-up), SDA value is available */
|
||||
_i2c_scl_high (bus);
|
||||
|
||||
/* clock stretching, wait as long as clock is driven to low by the slave */
|
||||
uint32_t stretch = I2C_CLOCK_STRETCH;
|
||||
while (!_i2c_scl_read (bus) && stretch--) {}
|
||||
if (stretch == 0) {
|
||||
DEBUG("%s: clock stretching timeout dev=%u\n", __func__, bus->dev);
|
||||
res = -ETIMEDOUT;
|
||||
}
|
||||
|
||||
/* wait t_HIGH - time for the slave to read SDA */
|
||||
/* min. in us: 4 (SM), 0.6 (FM), 0.26 (FPM), 0.09 (HSM); no max. */
|
||||
_i2c_delay (bus);
|
||||
|
||||
/* SCL is high, read out bit */
|
||||
*bit = _i2c_sda_read (bus);
|
||||
|
||||
/* SCL = active LOW to allow next SDA change */
|
||||
_i2c_scl_low(bus);
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
static /* IRAM */ int _i2c_write_byte (_i2c_bus_t* bus, uint8_t byte)
|
||||
{
|
||||
/* send one byte and returns 0 in case of ACK from slave */
|
||||
|
||||
/* send the byte from MSB to LSB */
|
||||
for (unsigned i = 0; i < 8; i++) {
|
||||
int res = _i2c_write_bit(bus, (byte & 0x80) != 0);
|
||||
if (res != 0) {
|
||||
return res;
|
||||
}
|
||||
byte = byte << 1;
|
||||
}
|
||||
|
||||
/* read acknowledge bit (low) from slave */
|
||||
bool bit;
|
||||
int res = _i2c_read_bit (bus, &bit);
|
||||
if (res != 0) {
|
||||
return res;
|
||||
}
|
||||
|
||||
return !bit ? 0 : -EIO;
|
||||
}
|
||||
|
||||
|
||||
static /* IRAM */ int _i2c_read_byte(_i2c_bus_t* bus, uint8_t *byte, bool ack)
|
||||
{
|
||||
bool bit;
|
||||
|
||||
/* read the byte */
|
||||
for (unsigned i = 0; i < 8; i++) {
|
||||
int res = _i2c_read_bit (bus, &bit);
|
||||
if (res != 0) {
|
||||
return res;
|
||||
}
|
||||
*byte = (*byte << 1) | (bit ? 1 : 0);
|
||||
}
|
||||
|
||||
/* write acknowledgement flag */
|
||||
_i2c_write_bit(bus, !ack);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void i2c_print_config(void)
|
||||
{
|
||||
for (unsigned dev = 0; dev < I2C_NUMOF; dev++) {
|
||||
printf("\tI2C_DEV(%u)\tscl=%d sda=%d\n",
|
||||
dev, i2c_config[dev].scl, i2c_config[dev].sda);
|
||||
}
|
||||
}
|
||||
|
||||
#else /* defined(I2C0_SPEED) || defined(I2C1_SPEED) */
|
||||
|
||||
void i2c_print_config(void)
|
||||
{
|
||||
LOG_TAG_INFO("i2c", "no I2C devices\n");
|
||||
}
|
||||
|
||||
#endif /* defined(I2C0_SPEED) || defined(I2C1_SPEED) */
|
||||
|
||||
#endif /* MODULE_ESP_I2C_SW */
|
||||
@ -1,3 +1,8 @@
|
||||
# additional modules dependencies
|
||||
|
||||
include $(RIOTCPU)/esp_common/Makefile.dep
|
||||
|
||||
ifneq (,$(filter periph_i2c,$(USEMODULE)))
|
||||
USEMODULE += esp_i2c_sw
|
||||
USEMODULE += periph_i2c_sw
|
||||
endif
|
||||
|
||||
@ -29,6 +29,7 @@ endif
|
||||
# ESP* pseudomodules
|
||||
|
||||
PSEUDOMODULES += esp_gdb
|
||||
PSEUDOMODULES += esp_i2c_sw
|
||||
PSEUDOMODULES += esp_log_colored
|
||||
PSEUDOMODULES += esp_log_tagged
|
||||
PSEUDOMODULES += esp_log_startup
|
||||
|
||||
@ -7,12 +7,12 @@
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup cpu_esp8266
|
||||
* @ingroup cpu_esp_common
|
||||
* @ingroup drivers_periph_i2c
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Low-level I2C driver implementation using ESP8266 SDK
|
||||
* @brief Low-level I2C driver software implementation using for ESP SoCs
|
||||
*
|
||||
* @author Gunar Schorcht <gunar@schorcht.net>
|
||||
*
|
||||
@ -40,6 +40,7 @@
|
||||
#include "periph/gpio.h"
|
||||
#include "periph/i2c.h"
|
||||
|
||||
#include "esp_attr.h"
|
||||
#include "esp_common.h"
|
||||
#include "gpio_arch.h"
|
||||
#include "rom/ets_sys.h"
|
||||
@ -116,7 +117,7 @@ static const uint32_t _i2c_delays[][2] =
|
||||
/* 1 us = 20 cycles (80 MHz) / 40 cycles (160 MHz) */
|
||||
[I2C_SPEED_LOW] = {989, 1990}, /* 10 kbps (period 100 us) */
|
||||
[I2C_SPEED_NORMAL] = { 89, 190}, /* 100 kbps (period 10 us) */
|
||||
[I2C_SPEED_FAST] = { 16, 40}, /* 400 kbps (period 2.5 us) */
|
||||
[I2C_SPEED_FAST] = { 15, 40}, /* 400 kbps (period 2.5 us) */
|
||||
[I2C_SPEED_FAST_PLUS] = { 0, 13}, /* 1 Mbps (period 1 us) */
|
||||
[I2C_SPEED_HIGH] = { 0, 0} /* 3.4 Mbps (period 0.3 us) is not working */
|
||||
};
|
||||
@ -248,7 +249,7 @@ void i2c_release(i2c_t dev)
|
||||
mutex_unlock(&_i2c_bus[dev].lock);
|
||||
}
|
||||
|
||||
int /* IRAM */ i2c_read_bytes(i2c_t dev, uint16_t addr, void *data, size_t len, uint8_t flags)
|
||||
int IRAM_ATTR i2c_read_bytes(i2c_t dev, uint16_t addr, void *data, size_t len, uint8_t flags)
|
||||
{
|
||||
DEBUG("%s: dev=%u addr=%02x data=%p len=%d flags=%01x\n",
|
||||
__func__, dev, addr, data, len, flags);
|
||||
@ -310,7 +311,7 @@ int /* IRAM */ i2c_read_bytes(i2c_t dev, uint16_t addr, void *data, size_t len,
|
||||
return res;
|
||||
}
|
||||
|
||||
int /* IRAM */ i2c_write_bytes(i2c_t dev, uint16_t addr, const void *data, size_t len, uint8_t flags)
|
||||
int IRAM_ATTR i2c_write_bytes(i2c_t dev, uint16_t addr, const void *data, size_t len, uint8_t flags)
|
||||
{
|
||||
DEBUG("%s: dev=%u addr=%02x data=%p len=%d flags=%01x\n",
|
||||
__func__, dev, addr, data, len, flags);
|
||||
@ -533,7 +534,7 @@ static void _i2c_abort(_i2c_bus_t* bus, const char* func)
|
||||
_i2c_clear(bus);
|
||||
}
|
||||
|
||||
static /* IRAM */ int _i2c_arbitration_lost (_i2c_bus_t* bus, const char* func)
|
||||
static IRAM_ATTR int _i2c_arbitration_lost(_i2c_bus_t* bus, const char* func)
|
||||
{
|
||||
DEBUG("%s: arbitration lost dev=%u\n", func, bus->dev);
|
||||
|
||||
@ -550,7 +551,7 @@ static /* IRAM */ int _i2c_arbitration_lost (_i2c_bus_t* bus, const char* func)
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
static /* IRAM */ int _i2c_start_cond(_i2c_bus_t* bus)
|
||||
static IRAM_ATTR int _i2c_start_cond(_i2c_bus_t* bus)
|
||||
{
|
||||
/*
|
||||
* send start condition
|
||||
@ -609,7 +610,7 @@ static /* IRAM */ int _i2c_start_cond(_i2c_bus_t* bus)
|
||||
return res;
|
||||
}
|
||||
|
||||
static /* IRAM */ int _i2c_stop_cond(_i2c_bus_t* bus)
|
||||
static IRAM_ATTR int _i2c_stop_cond(_i2c_bus_t* bus)
|
||||
{
|
||||
/*
|
||||
* send stop condition
|
||||
@ -663,7 +664,7 @@ static /* IRAM */ int _i2c_stop_cond(_i2c_bus_t* bus)
|
||||
return res;
|
||||
}
|
||||
|
||||
static /* IRAM */ int _i2c_write_bit (_i2c_bus_t* bus, bool bit)
|
||||
static IRAM_ATTR int _i2c_write_bit(_i2c_bus_t* bus, bool bit)
|
||||
{
|
||||
/*
|
||||
* send one bit
|
||||
@ -714,7 +715,7 @@ static /* IRAM */ int _i2c_write_bit (_i2c_bus_t* bus, bool bit)
|
||||
return res;
|
||||
}
|
||||
|
||||
static /* IRAM */ int _i2c_read_bit (_i2c_bus_t* bus, bool* bit)
|
||||
static IRAM_ATTR int _i2c_read_bit(_i2c_bus_t* bus, bool* bit)
|
||||
{
|
||||
/* read one bit
|
||||
* on entry: SCL is active low, SDA can be changed
|
||||
@ -756,7 +757,7 @@ static /* IRAM */ int _i2c_read_bit (_i2c_bus_t* bus, bool* bit)
|
||||
return res;
|
||||
}
|
||||
|
||||
static /* IRAM */ int _i2c_write_byte (_i2c_bus_t* bus, uint8_t byte)
|
||||
static IRAM_ATTR int _i2c_write_byte(_i2c_bus_t* bus, uint8_t byte)
|
||||
{
|
||||
/* send one byte and returns 0 in case of ACK from slave */
|
||||
|
||||
@ -780,7 +781,7 @@ static /* IRAM */ int _i2c_write_byte (_i2c_bus_t* bus, uint8_t byte)
|
||||
}
|
||||
|
||||
|
||||
static /* IRAM */ int _i2c_read_byte(_i2c_bus_t* bus, uint8_t *byte, bool ack)
|
||||
static IRAM_ATTR int _i2c_read_byte(_i2c_bus_t* bus, uint8_t *byte, bool ack)
|
||||
{
|
||||
bool bit;
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user