nucleo-f446ze: Add DMA config for SPI

This commit is contained in:
Koen Zandberg 2020-05-15 23:10:14 +02:00
parent 5cee9c61e1
commit 08123b9736
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GPG Key ID: 0895A893E6D2985B
2 changed files with 27 additions and 2 deletions

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@ -2,6 +2,7 @@ CPU = stm32f4
CPU_MODEL = stm32f446ze CPU_MODEL = stm32f446ze
# Put defined MCU peripherals here (in alphabetical order) # Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_dma
FEATURES_PROVIDED += periph_i2c FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_pwm FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_rtc FEATURES_PROVIDED += periph_rtc

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@ -30,6 +30,24 @@
extern "C" { extern "C" {
#endif #endif
/**
* @name DMA streams configuration
* @{
*/
#ifdef MODULE_PERIPH_DMA
static const dma_conf_t dma_config[] = {
{ .stream = 11 }, /* DMA2 Stream 3 - SPI1_TX */
{ .stream = 10 }, /* DMA2 Stream 2 - SPI1_RX */
};
#define DMA_0_ISR isr_dma2_stream3
#define DMA_1_ISR isr_dma2_stream2
#define DMA_NUMOF ARRAY_SIZE(dma_config)
#endif /* MODULE_PERIPH_DMA */
/** @} */
/** /**
* @name UART configuration * @name UART configuration
* @{ * @{
@ -132,8 +150,14 @@ static const spi_conf_t spi_config[] = {
.sclk_af = GPIO_AF5, .sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5, .cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN, .rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2 .apbbus = APB2,
} #ifdef MODULE_PERIPH_DMA
.tx_dma = 0,
.tx_dma_chan = 3,
.rx_dma = 1,
.rx_dma_chan = 3,
#endif
},
}; };
#define SPI_NUMOF ARRAY_SIZE(spi_config) #define SPI_NUMOF ARRAY_SIZE(spi_config)