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boards/stm32f2f4f7: adapt 100MHz clock config for USB

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This commit is contained in:
Alexandre Abadie 2020-09-18 09:53:49 +02:00
parent b743397749
commit 0828400eb0
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GPG Key ID: 1C919A403CAE1405
1 changed files with 21 additions and 2 deletions
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23
boards/common/stm32/include/f2f4f7/cfg_clock_default_100.h
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@ -33,17 +33,36 @@ extern "C" {
* @name Clock PLL settings (100MHz) * @name Clock PLL settings (100MHz)
* @{ * @{
*/ */
/* The following parameters configure a 100MHz system clock with HSE (8MHz or /* The following parameters configure a 100MHz system clock with HSE (8MHz, 16MHz or
16MHz) or HSI (16MHz) as PLL input clock */ 25MHz) or HSI (16MHz) as PLL input clock.
If USB is used and no alternative 48MHz is available, the clock frequency is
decreased to 96MHZ so the PLLQ can output 48MHz.
*/
#ifndef CONFIG_CLOCK_PLL_M #ifndef CONFIG_CLOCK_PLL_M
#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(25))
#define CONFIG_CLOCK_PLL_M (25)
#else
#define CONFIG_CLOCK_PLL_M (4) #define CONFIG_CLOCK_PLL_M (4)
#endif #endif
#endif
#ifndef CONFIG_CLOCK_PLL_N #ifndef CONFIG_CLOCK_PLL_N
#if IS_USED(MODULE_PERIPH_USBDEV) && defined(CPU_LINE_STM32F411xE)
#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(8))
#define CONFIG_CLOCK_PLL_N (96)
#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(25))
#define CONFIG_CLOCK_PLL_N (192)
#else
#define CONFIG_CLOCK_PLL_N (48)
#endif
#else
#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(8)) #if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(8))
#define CONFIG_CLOCK_PLL_N (100) #define CONFIG_CLOCK_PLL_N (100)
#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(25))
#define CONFIG_CLOCK_PLL_N (200)
#else #else
#define CONFIG_CLOCK_PLL_N (50) #define CONFIG_CLOCK_PLL_N (50)
#endif #endif
#endif /* MODULE_PERIPH_USBDEV */
#endif #endif
#ifndef CONFIG_CLOCK_PLL_P #ifndef CONFIG_CLOCK_PLL_P
#define CONFIG_CLOCK_PLL_P (2) #define CONFIG_CLOCK_PLL_P (2)