boards/same54-xpro: add configuration for SPI flash

boards/same54-xpro/Makefile.dep

@@ -5,3 +5,8 @@ endif
 ifneq (,$(filter eui_provider,$(USEMODULE)))
   USEMODULE += at24mac
 endif
+
+ifneq (,$(filter mtd,$(USEMODULE)))
+  FEATURES_REQUIRED += periph_spi_on_qspi
+  USEMODULE += mtd_spi_nor
+endif

boards/same54-xpro/board.c

@@ -20,6 +20,38 @@
 
 #include "board.h"
 #include "periph/gpio.h"
+#include "mtd_spi_nor.h"
+#include "timex.h"
+
+#ifdef MODULE_MTD
+/* N25Q256A */
+static const mtd_spi_nor_params_t _same54_nor_params = {
+    .opcode = &mtd_spi_nor_opcode_default,
+    .wait_chip_erase = 240 * US_PER_SEC,
+    .wait_64k_erase = 700 * US_PER_MS,
+    .wait_sector_erase = 250 * US_PER_MS,
+    .wait_chip_wake_up = 1 * US_PER_MS,
+    .clk  = MHZ(54),
+    .flag = SPI_NOR_F_SECT_4K | SPI_NOR_F_SECT_64K,
+    .spi  = SPI_DEV(2),
+    .mode = SPI_MODE_0,
+    .cs   = SAM0_QSPI_PIN_CS,
+    .wp   = SAM0_QSPI_PIN_DATA_2,
+    .hold = SAM0_QSPI_PIN_DATA_3,
+    .addr_width = 4,
+};
+
+static mtd_spi_nor_t same54_nor_dev = {
+    .base = {
+        .driver = &mtd_spi_nor_driver,
+        .page_size = 256,
+        .pages_per_sector = 16,
+    },
+    .params = &_same54_nor_params,
+};
+
+mtd_dev_t *mtd0 = (mtd_dev_t *)&same54_nor_dev;
+#endif /* MODULE_MTD */
 
 void board_init(void)
 {

boards/same54-xpro/include/board.h

@@ -22,6 +22,7 @@
 
 #include "cpu.h"
 #include "at24mac.h"
+#include "mtd.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -83,6 +84,14 @@ static inline int _at24mac_get_eui48(const void *arg, eui48_t *addr)
 #define BTN0_MODE           GPIO_IN_PU
 /** @} */
 
+/**
+ * @name MTD configuration
+ * @{
+ */
+extern mtd_dev_t *mtd0;
+#define MTD_0 mtd0
+/** @} */
+
 /**
  * @name    Xtimer configuration
  * @{

boards/same54-xpro/include/periph_conf.h

@@ -251,7 +251,25 @@ static const spi_conf_t spi_config[] = {
         .tx_trigger = SERCOM6_DMAC_ID_TX,
         .rx_trigger = SERCOM6_DMAC_ID_RX,
 #endif
-    }
+    },
+#ifdef MODULE_PERIPH_SPI_ON_QSPI
+    {    /* QSPI in SPI mode */
+        .dev      = QSPI,
+        .miso_pin = SAM0_QSPI_PIN_DATA_1,
+        .mosi_pin = SAM0_QSPI_PIN_DATA_0,
+        .clk_pin  = SAM0_QSPI_PIN_CLK,
+        .miso_mux = SAM0_QSPI_MUX,
+        .mosi_mux = SAM0_QSPI_MUX,
+        .clk_mux  = SAM0_QSPI_MUX,
+        .miso_pad = SPI_PAD_MISO_0,         /* unused */
+        .mosi_pad = SPI_PAD_MOSI_0_SCK_1,   /* unused */
+        .gclk_src = SAM0_GCLK_MAIN,         /* unused */
+#ifdef MODULE_PERIPH_DMA
+        .tx_trigger = QSPI_DMAC_ID_TX,
+        .rx_trigger = QSPI_DMAC_ID_RX,
+#endif
+    },
+#endif
 };
 
 #define SPI_NUMOF           ARRAY_SIZE(spi_config)